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    FABRICATION METHOD TO MINIMIZE BALLAST LAYER DEFECTS
    21.
    发明申请
    FABRICATION METHOD TO MINIMIZE BALLAST LAYER DEFECTS 审中-公开
    制造方法，以最小化镇流器层缺陷

    公开(公告)号：WO2009017929A3

    公开(公告)日：2009-04-09

    申请号：PCT/US2008069004

    申请日：2008-07-02

    Applicant: MOTOROLA INC ,  YOUNG STEVEN ,  DAUKSHER WILLIAM ,  HOWARD EMMETT ,  WESTON DONALD

    Inventor： YOUNG STEVEN ,  DAUKSHER WILLIAM ,  HOWARD EMMETT ,  WESTON DONALD

    IPC: H01L21/331

    CPC classification number: H01J9/025 ,  H01J1/304 ,  H01J2201/3195

    Abstract: A method for minimizing fabrication defects in ballast contact to a conductor in monolithically integrated semiconductor devices includes forming a sloping sidewall (318, 424) in both an insulating layer (106, 718) overlying a conductive layer (104, 714) by etching with a an RF biased fluorine based chemistry and an RF biased chlorine based chemistry, respectively, as defined by a single resist layer (108) having a sloped sidewall (212). A ballast layer (526, 726) is deposited on the structure (100, 700) and metal contacts (632, 634, 636, 638, 722) are disposed on the ballast layer (526, 722).

    Abstract translation: 一种用于使单片集成半导体器件中的导体的镇流器接触中的制造缺陷最小化的方法包括：通过用导电层（104,714）蚀刻的绝缘层（106,718）中的两者来形成倾斜侧壁（318,424） 分别由具有倾斜侧壁（212）的单个抗蚀剂层（108）限定的RF偏压氟基化学物质和RF偏压氯基化学物质。 在结构（100,700）上沉积压载层（526,726），并且在压载层（526,722）上设置金属接触件（632,634,636,638,722）。

    FABRICATION METHOD TO MINIMIZE BALLAST LAYER DEFECTS
    22.
    发明申请
    FABRICATION METHOD TO MINIMIZE BALLAST LAYER DEFECTS 审中-公开
    最小化BALLAST层缺陷的制造方法

    公开(公告)号：WO2009017929A2

    公开(公告)日：2009-02-05

    申请号：PCT/US2008/069004

    申请日：2008-07-02

    Applicant: MOTOROLA, INC. ,  YOUNG, Steven ,  DAUKSHER, William ,  HOWARD, Emmett ,  WESTON, Donald

    Inventor： YOUNG, Steven ,  DAUKSHER, William ,  HOWARD, Emmett ,  WESTON, Donald

    IPC: H01L21/331

    CPC classification number: H01J9/025 ,  H01J1/304 ,  H01J2201/3195

    Abstract: A method for minimizing fabrication defects in ballast contact to a conductor in monolithically integrated semiconductor devices includes forming a sloping sidewall (318, 424) in both an insulating layer (106, 718) overlying a conductive layer (104, 714) by etching with a an RF biased fluorine based chemistry and an RF biased chlorine based chemistry, respectively, as defined by a single resist layer (108) having a sloped sidewall (212). A ballast layer (526, 726) is deposited on the structure (100, 700) and metal contacts (632, 634, 636, 638, 722) are disposed on the ballast layer (526, 722).

    Abstract translation: 一种用于使在单片集成半导体器件中的导体的镇流器接触中的制造缺陷最小化的方法包括：在覆盖导电层（104,714）的绝缘层（106,78）中形成倾斜侧壁（318,424） 分别由具有倾斜侧壁（212）的单个抗蚀剂层（108）限定的RF偏置氟基化学和RF偏置氯基化学。 沉积在结构（100,700）上的压载层（526,726），并且金属触点（632,634,636,638,722）设置在镇流器层（526,722）上。

    Light emitting device, and image display device using the same
    24.
    发明专利
    Light emitting device, and image display device using the same 审中-公开
    发光装置和使用其的图像显示装置

    公开(公告)号：JP2010102030A

    公开(公告)日：2010-05-06

    申请号：JP2008272126

    申请日：2008-10-22

    Applicant: Canon Inc ,  キヤノン株式会社

    Inventor： SUMIYA TOSHIJI ,  AZUMA HISAFUMI ,  IBA JUN

    IPC: G09F9/30 ,  G09G3/20 ,  G09G3/22 ,  H01J29/04 ,  H01J31/12

    CPC classification number: H01J63/06 ,  H01J1/30 ,  H01J1/316 ,  H01J17/34 ,  H01J31/127 ,  H01J61/305 ,  H01J2201/3195 ,  H01J2329/0497

    Abstract: PROBLEM TO BE SOLVED: To compensate display irregularity caused by temperature distribution during driving without complicating the device constitution.
    SOLUTION: A light emitting device includes a plurality of light emitting elements having a light emitter and a plurality of resistors made of the same material having a negative resistance temperature characteristic. The plurality of resistors are connected in series to the plurality of light emitting elements, respectively. A resistor having high temperature during driving has higher resistance value at the same temperature than a resistor having low temperature during driving.
    COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：为了补偿在驾驶期间由温度分布引起的显示不规则性，而不会使装置结构复杂化。 解决方案：发光器件包括具有发光体的多个发光元件和由具有负电阻温度特性的相同材料制成的多个电阻器。 多个电阻器分别与多个发光元件串联连接。 在驱动期间具有高温的电阻器在与驱动期间具有低温的电阻器相同的温度下具有较高的电阻值。 版权所有（C）2010，JPO＆INPIT

    전자 방출 디바이스 및 이를 이용한 전자 방출 표시디바이스
    26.
    发明公开
    전자 방출 디바이스 및 이를 이용한 전자 방출 표시디바이스 无效

    公开(公告)号：KR1020070042649A

    公开(公告)日：2007-04-24

    申请号：KR1020050098507

    申请日：2005-10-19

    Applicant: 삼성에스디아이 주식회사

    Inventor： 조진희 ,  이상조 ,  홍수봉

    IPC: H01J1/30 ,  C01B31/02

    CPC classification number: H01J1/30 ,  H01J29/04 ,  H01J31/127 ,  H01J63/02 ,  H01J2201/3195 ,  H01J2329/0497

    Abstract: 본 발명은 저항층들의 저항값 변화를 억제하여 화소별 에미션 특성을 균일화할 수 있는 전자 방출 디바이스 및 이를 이용한 전자 방출 표시 디바이스에 관한 것이다. 본 발명에 따른 전자 방출 디바이스는 기판과, 기판 위에 형성되는 캐소드 전극들과, 캐소드 전극들과 절연되어 위치하는 게이트 전극들과, 캐소드 전극에 전기적으로 연결되는 전자 방출부들을 포함한다. 각각의 캐소드 전극은 내부에 개구부를 형성하는 라인 전극과, 개구부 내측에서 라인 전극과 이격되어 위치하는 격리 전극과, 라인 전극과 격리 전극을 전기적으로 연결하는 저항층을 포함하고, 저항층의 일면에 저항층의 산화 억제를 위한 보호층이 형성된다.
    캐소드전극, 게이트전극, 전자방출부, 저항층, 보호층, 형광층, 집속전극, 애노드전극

    에프이디 패널의 그라운드 전극구조
    27.
    发明公开
    에프이디 패널의 그라운드 전극구조 无效
    FED面板接地电极结构

    公开(公告)号：KR1020040069529A

    公开(公告)日：2004-08-06

    申请号：KR1020030005953

    申请日：2003-01-29

    Applicant: 엘지전자 주식회사

    Inventor： 이범주

    IPC: H01J1/304

    CPC classification number: H01J31/123 ,  H01J1/88 ,  H01J2201/3195

    Abstract: PURPOSE: A structure of a ground electrode of an FED panel is provided to remove the generation of signal disturbance by preventing the short circuit in a contact state between the ground electrode and electric lines. CONSTITUTION: An FED panel includes a spacer and a ground electrode. The ground electrode(301) is installed at a lower side of the spacer(104). The ground electrode is formed with a predetermined material having a specific resistance. The specific resistance of the ground electrode is lower than the specific resistance of the spacer. In addition, the specific resistance of the ground electrode is higher than the specific resistance of an electric line. The specific resistance of the ground electrode has a range of 10¬0 to 10¬9¥Øcm.

    Abstract translation: 目的：提供FED面板的接地电极的结构，通过防止接地电极与电线之间的接触状态的短路来消除信号干扰的产生。 构成：FED面板包括间隔物和接地电极。 接地电极（301）安装在间隔件（104）的下侧。 接地电极由具有电阻率的预定材料形成。 接地电极的比电阻低于间隔物的电阻率。 此外，接地电极的电阻比电线的电阻率高。 接地电极的电阻率为10〜10〜9×Øcm。

    전자 방출 디바이스와 이의 제조 방법 및 이를 이용한 발광장치
    28.
    发明公开
    전자 방출 디바이스와 이의 제조 방법 및 이를 이용한 발광장치 无效
    电子发射装置，装置的制造方法和使用该装置的发光装置

    公开(公告)号：KR1020080036781A

    公开(公告)日：2008-04-29

    申请号：KR1020060103461

    申请日：2006-10-24

    Applicant: 삼성에스디아이 주식회사

    Inventor： 노기현 ,  이천규

    IPC: H01J1/30 ,  C01B31/02

    CPC classification number: H01J1/30 ,  H01J2201/30453 ,  H01J2201/3195

    Abstract: An electron emission device, a manufacturing method thereof, and a light emitting device using the same are provided to prevent emission error by supplying driving currents in an electron emitting unit through a conductive path even when shrinking is generated in the electron emitting unit. An electron emission device includes a substrate, a cathode electrode, and electron emitting units(20). The cathode electrode includes a main electrode(141), a resistive layer(143), and a connection electrode(142). The main electrode is elongated along a direction of the substrate. The resistive layer having apertures(143a) is connected to the main electrode. The connection electrode, which is disposed in the apertures, is connected to the resistive layer. The electron emitting units, which are positioned at the apertures, are connected to the connection terminal.

    Abstract translation: 提供电子发射器件，其制造方法和使用该发光器件的发光器件，以便即使在电子发射单元中产生收缩时，也可通过导电通道在电子发射单元中提供驱动电流来防止发射误差。 电子发射器件包括衬底，阴极电极和电子发射单元（20）。 阴极包括主电极（141），电阻层（143）和连接电极（142）。 主电极沿着衬底的方向伸长。 具有孔（143a）的电阻层连接到主电极。 设置在孔中的连接电极连接到电阻层。 位于孔径处的电子发射单元连接到连接端子。

    ELECTRON EMISSION DEVICE AND ELECTRON EMISSION DISPLAY DEVICE HAVING THE SAME
    29.
    发明公开
    ELECTRON EMISSION DEVICE AND ELECTRON EMISSION DISPLAY DEVICE HAVING THE SAME 审中-公开
    电子发射装置和具有该发射装置的电子发射显示装置

    公开(公告)号：KR20070107262A

    公开(公告)日：2007-11-07

    申请号：KR20060039534

    申请日：2006-05-02

    Applicant: SAMSUNG SDI CO LTD

    Inventor： AHN SANG HYUCK ,  LEE SANG JO ,  JEA BYUNG GIL ,  CHO JIN HUI ,  HONG SU BONG ,  JEON SANG HO

    IPC: H01J1/30

    CPC classification number: H01J1/30 ,  H01J2201/3195 ,  H01J2203/024 ,  H01J2229/481 ,  H01J2329/4639

    Abstract: An electron emission device and an electron emission display device having the same are provided to prevent dispersion of an electron beam when the electron beam passes through focus electrodes. Cathode electrodes(110) are formed on a substrate(10), and an electron emission part(140) is formed on the cathode electrode. Gate electrodes(130) are formed on the cathode electrodes, and have openings(120a,130a) corresponding to the electron emission part. Focus electrodes(160) are formed on the gate electrodes, and have openings at portions in which the cathode electrodes intersect the gate electrodes. A resistor layer(170) is formed at a region around the electron emission part.

    Abstract translation: 提供电子发射装置和具有该电子发射装置的电子发射显示装置，以防止当电子束通过聚焦电极时电子束的分散。 阴极电极（110）形成在基板（10）上，并且在阴极上形成电子发射部分（140）。 栅电极（130）形成在阴极电极上，具有与电子发射部分对应的开口（120a，130a）。 聚焦电极（160）形成在栅电极上，并且在阴极电极与栅电极相交的部分处具有开口。 在电子发射部分周围的区域形成电阻层（170）。

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