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公开(公告)号:CA2866792C
公开(公告)日:2021-03-02
申请号:CA2866792
申请日:2013-03-01
Applicant: IBM
Inventor: FARRELL MARK S , GAINEY CHARLES W , MITRAN MARCEL , SHUM CHUNG-LUNG KEVIN , SLEGEL TIMOTHY , SMITH BRIAN LEONARD , STOODLEY KEVIN A
IPC: G06F11/34
Abstract: Embodiments of the invention relate to enabling and disabling execution of a run-time instrumentation facility. An instruction for execution by the processor in a lesser privileged state is fetched by the processor. It is determined, by the processor, that the run-time instrumentation facility permits execution of the instruction in the lesser-privileged state and that controls associated with the run-time instrumentation facility are valid. The run-time instrumentation facility is disabled based on the instruction being a run-time instrumentation facility off (RIOFF) instruction. The disabling includes updating a bit in a program status word (PSW) of the processor to indicate that run-time instrumentation data should not be captured by the processor. The run-time instrumentation facility is enabled based on the instruction being a run-time instrumentation facility on (RION) instruction. The enabling includes updating the bit in the PSW to indicate that run-time instrumentation data should be captured by the processor.
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公开(公告)号:CA2874184C
公开(公告)日:2021-01-12
申请号:CA2874184
申请日:2012-11-26
Applicant: IBM
Inventor: GREINER DAN , SLEGEL TIMOTHY , JACOBI CHRISTIAN , RELSON PETER JEREMY , PHILLEY RANDALL WILLIAM
IPC: G06F9/30
Abstract: An operation is provided to signal a processor that action is to be taken to facilitate execution of a transaction that has aborted one or more times. The operation is specified within an instruction or is itself an instruction. The instruction is executed based on detecting an abort of the transactions, and includes a field indicating how many times the transaction has aborted. The processor uses this information to determine what action is to be taken.
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公开(公告)号:AU2018209038B2
公开(公告)日:2020-10-08
申请号:AU2018209038
申请日:2018-01-03
Applicant: IBM
Inventor: GREINER DAN , SLEGEL TIMOTHY , JACOBI CHRISTIAN , SAPORITO ANTHONY , PAPROTSKI VOLODYMYR , MITRAN MARCEL
IPC: G06F9/30
Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.
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公开(公告)号:AU2017341251B2
公开(公告)日:2020-10-01
申请号:AU2017341251
申请日:2017-10-02
Applicant: IBM
Inventor: GREINER DAN , SLEGEL TIMOTHY , ZOELLIN CHRISTIAN , JACOBI CHRISTIAN , PAPROTSKI VOLODYMYR , VISEGRADY TAMAS , BUENDGEN REINHARD THEODOR , BRADBURY JONATHAN , PURANIK ADITYA NITIN
Abstract: An instruction to perform ciphering and authentication is executed. The executing includes ciphering one set of data provided by the instruction to obtain ciphered data and placing the ciphered data in a designated location. It further includes authenticating an additional set of data provided by the instruction, in which the authenticating generates at least a part of a message authentication tag. The at least a part of the message authentication tag is stored in a selected location.
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公开(公告)号:CA3127849A1
公开(公告)日:2020-08-06
申请号:CA3127849
申请日:2020-01-23
Applicant: IBM
Inventor: GIAMEI BRUCE CONRAD , KLEIN MATTHIAS , SLEGEL TIMOTHY , FARRELL MARK , SOFIA ANTHONY THOMAS , WEISHAUPT SIMON , MISHRA ASHUTOSH
IPC: G06F9/30
Abstract: A DEFLATE Conversion Call general-purpose processor instruction. An instruction is obtained by a general- purpose processor of the computing environment. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes transforming, based on a function to be performedby the instruction being a compression functionor a decompression function, state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data. The transformed state of the data is provided as output to be used in performing a task.
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公开(公告)号:CA2895653C
公开(公告)日:2020-08-04
申请号:CA2895653
申请日:2013-12-06
Applicant: IBM
Inventor: BRADBURY JONATHAN DAVID , SCHWARZ ERIC MARK , SLEGEL TIMOTHY , GSCHWIND MICHAEL KARL
IPC: G06F17/16
Abstract: Vector exception handling is facilitated. A vector instruction is executed that operates on one or more elements of a vector register. When an exception is encountered during execution of the instruction, a vector exception code is provided that indicates a position within the vector register that caused the exception. The vector exception code also includes a reason for the exception.
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公开(公告)号:CA2867117C
公开(公告)日:2020-02-18
申请号:CA2867117
申请日:2013-03-01
Applicant: IBM
Inventor: BRADBURY JONATHAN DAVID , GSCHWIND MICHAEL KARL , SLEGEL TIMOTHY
Abstract: The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.
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公开(公告)号:PL2862057T3
公开(公告)日:2019-07-31
申请号:PL12878862
申请日:2012-11-26
Applicant: IBM
Inventor: GREINER DAN , JACOBI CHRISTIAN , SLEGEL TIMOTHY , MITRAN MARCEL
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公开(公告)号:AU2018209084A1
公开(公告)日:2019-06-13
申请号:AU2018209084
申请日:2018-01-12
Applicant: IBM
Inventor: GREINER DAN , SLEGEL TIMOTHY , JACOBI CHRISTIAN , SAPORITO ANTHONY , SHUM CHUNG-LUNG , OSISEK DAMIAN
Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.
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公开(公告)号:AU2017393885A1
公开(公告)日:2019-06-13
申请号:AU2017393885
申请日:2017-11-09
Applicant: IBM
Inventor: GREINER DAN , SAPORITO ANTHONY , SHUM CHUNG-LUNG , SLEGEL TIMOTHY , JACOBI CHRISTIAN
IPC: G06F9/30
Abstract: An instruction to perform a conditional branch to an indirectly specified location is executed. A branch address is obtained from a location in memory, the location in memory designated by the instruction. A determination is made,based on a condition code of another instruction, whether a branch is to occur, and a branch to the branch address is performed, based on determining the branch is to occur.
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