Integrated circuit arrangement with transistors working voltage control e.g. for differential amplifier

    公开(公告)号:DE19950543C1

    公开(公告)日:2000-11-23

    申请号:DE19950543

    申请日:1999-10-20

    Abstract: An integrated circuit includes a first control unit (C1) for controlling the operating/working voltage of first conductivity type transistors (T1,T2), the latter having substrate terminals for supply of substrate potentials (Vnw;Vpw). The control unit has an input for a desired value (VTnsoll) and an input for an actual value (VTnist) of the working voltage of the transistors of the first conductivity type (T1,T2) as well as an output connected to the substrate terminals of the first conductivity type transistors. A second control unit (C2) controls the working voltage of the second conductivity type transistors (T3,T4) and has inputs for a desired value and an actual value (VTpist) of the working voltage of these transistors (T3,T4), and an output connected to the substrate terminals of these transistors (T3,T4). A desired value for the working voltage of the transistors (T3,T4) is supplied to the desired value input of the second control unit (C2), and is proportional to the amount of the actual value (VTnist) of the working voltage of the first conductivity type transistors (T1,T2).

    32.
    发明专利
    未知

    公开(公告)号:DE19835258B4

    公开(公告)日:2006-07-27

    申请号:DE19835258

    申请日:1998-08-04

    Abstract: An integrated circuit incorporating a self-test device and a method for producing a self-testing integrated circuit. The integrated circuit has a program memory with at least one external terminal for loading external test programs. The integrated circuit has a self-test device connected to the program memory, the self-test device executing program commands of a test program loaded into the program memory, the program commands succeeding one another in address terms, for carrying out a self-test of the circuit. The self-test device has an interrupt signal input, through which the self-test device interrupts the test program that is currently being executed by not executing the respective succeeding program command in address terms. Rather, it executes a program jump within the test program, the program jump being triggered by the interrupt signal.

    33.
    发明专利
    未知

    公开(公告)号:DE102004050104A1

    公开(公告)日:2006-04-27

    申请号:DE102004050104

    申请日:2004-10-14

    Inventor: KAISER ROBERT

    Abstract: The invention relates to a semi-conductor component ( 2 a, 2 b), and a process for reading test data, whereby the process comprises the steps: (a) Reading test data generated during a semi-conductor component test procedure from at least one test data register ( 102 a) of a semi-conductor component ( 2 a), (b) Storing the test data in at least one useful data memory cell on the semi-conductor component ( 2 a), and (c) Reading the test data from the at least one useful data memory cell.

    34.
    发明专利
    未知

    公开(公告)号:DE50107003D1

    公开(公告)日:2005-09-08

    申请号:DE50107003

    申请日:2001-12-04

    Abstract: A circuit configuration for driving a programmable link has a volatile memory cell, which is coupled to the fuse for the permanent storage of data stored in the volatile memory, and also a shift register, which enables data to be read out from the volatile memory cell and data to be written to the memory cell. In this case, a plurality of shift registers may be interconnected to form a shift register chain for the purpose of driving a plurality of fuses. The shift register chain thus enables fast writing and reading to/from the volatile memory with a low outlay on circuitry.

    36.
    发明专利
    未知

    公开(公告)号:DE50104255D1

    公开(公告)日:2004-11-25

    申请号:DE50104255

    申请日:2001-12-18

    Abstract: A circuit configuration for driving a programmable link has a drive circuit for the selection and blowing of the fuse, and also a shift register, by which an activation signal can be fed to the drive circuit. In order to provide the data to be blown, in a preferred embodiment, a volatile memory cell may be provided. The present circuit configuration enables the blowing of fuses and thus repair of defective memory cells in mass memories even after encapsulation of a chip having the mass memory. Moreover, the shift register described effectively prevents impermissibly high currents from being able to occur as a result of simultaneous blowing of too many fuses.

    37.
    发明专利
    未知

    公开(公告)号:DE59811858D1

    公开(公告)日:2004-09-30

    申请号:DE59811858

    申请日:1998-06-04

    Abstract: The circuit arrangement includes a device (10) for generating digital signals, with a voltage connection (8) for the supply of an external reference voltage to the device, and a voltage generator (2) for the production of an internal reference voltage which is supplied to the device over a switch (4). A level converter (6) is provided for the control of the switch, whereby a switch signal for the switching of the switch is raised on a level lying above the switching threshold of the switch. An output coupling capacitor (C1) is connected between the output of the voltage generator and a first supply voltage (VSS).

    38.
    发明专利
    未知

    公开(公告)号:DE50102500D1

    公开(公告)日:2004-07-08

    申请号:DE50102500

    申请日:2001-12-18

    Abstract: A circuit configuration for driving a programmable link, for example a fuse, is specified, having a drive circuit for driving the fuse in a manner dependent on a signal present at the data input, and also a volatile memory, whose output is preferably directly connected to the data input of the drive circuit. A circuit configuration for particularly fast and simple programming of fuses, in particular electrically programmable fuses, is thereby specified.

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