31.
    发明专利
    未知

    公开(公告)号:DE102004044678A1

    公开(公告)日:2006-03-16

    申请号:DE102004044678

    申请日:2004-09-09

    Abstract: In a method for fabricating a capacitor that includes an electrode structure (80), an auxiliary layer (40) is formed over a substrate (10). A recess (60), which determines the shape of the electrode structure (80), is etched into the auxiliary layer (40), and the electrode structure of the capacitor is formed in the recess. As an example, the auxiliary layer can be a semiconductor layer (40).

    32.
    发明专利
    未知

    公开(公告)号:DE10321466A1

    公开(公告)日:2004-12-16

    申请号:DE10321466

    申请日:2003-05-13

    Abstract: A trench storage capacitor includes a buried plate that is lengthened by a doped silicon layer to right over the collar insulating layer. The conductor layer of the trench storage capacitor is preferably applied to a "buried" collar insulating layer and masked with the aid of a protective layer fabricated by ALD. In an exemplary embodiment, the conductor layer is composed of amorphous silicon, which is used as an HSG layer in a lower trench region.

    35.
    发明专利
    未知

    公开(公告)号:DE10207131A1

    公开(公告)日:2003-08-28

    申请号:DE10207131

    申请日:2002-02-20

    Abstract: A hard mask is produced from spacer structures. The spacer structures are formed from a conformal deposition on elevated structures produced lithographically in a projection process. The conformal deposition is etched back laterally on the elevated structures resulting in the spacer structures. The elevated structures between the spacer structures are subsequently etched away, so that the spacer structures remain in an isolated fashion as sublithographic structures of a hard mask with a doubled structure density compared with that originally produced in lithographic projection. In a regularly disposed two-dimensional array of structures in the hard mask for forming trenches-for instance for trench capacitors-the method achieves a doubling of the structure density in the array. A further iteration step is formed by forming further spacer structures on the first and second spacer structures, thereby achieving an even higher increase in structure density in the hard mask.

    Integrated circuit for contactless in-situ detection of wafer temperature derives temperature dependent signal from temperature-independent signal produced from a.c. electromagnetic field

    公开(公告)号:DE10134432A1

    公开(公告)日:2002-11-21

    申请号:DE10134432

    申请日:2001-07-19

    Abstract: The device has a first signal generator for generating a temperature-independent signal from an a.c. electromagnet field, a temperature-dependent impedance device for producing a characteristic temperature-dependent signal for the wafer from the first signal, a second signal generator for producing a temperature-dependent alternating field signal and a device for wireless transmission of the temperature-dependent alternating field signal. The device has a first signal generator (L1,C,C',G,SQ) for generating a temperature-independent signal (Uv) from an electromagnet alternating field (WF), a temperature-dependent impedance device (R1,R2) for producing a characteristic temperature-dependent signal (UT) for the wafer from the first signal, a second signal generator (FG) for producing a temperature-dependent alternating field signal (WS) from the temperature-dependent signal and a transmission device (Fl,ANT) for wireless transmission of the temperature-dependent alternating field signal as a temperature-dependent transmission signal (TS). AN Independent claim is also included for the following: a method of contactless in-situ detection of wafer temperature.

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