公开(公告)号：DE102008027703A1

公开(公告)日：2009-01-08

申请号：DE102008027703

申请日：2008-06-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF ,  SCHLOEGEL XAVER ,  HOEGLAUER JOSEF ,  HUBER ERWIN

IPC: H01L25/16 ,  H01L23/48

Abstract: A semiconductor device is disclosed. One embodiment provides a module including a first carrier having a first mounting surface and a second mounting surface, a first semiconductor chip mounted onto the first mounting surface of the first carrier and having a first surface facing away from the first carrier, a first connection element connected to the first surface of the first semiconductor chip, a second semiconductor chip having a first surface facing away from the first carrier, a second connection element connected to the first surface of the second semiconductor chip, and a mold material covering the first connection element and the second connection element only partially.

公开(公告)号：DE102006022254B4

公开(公告)日：2008-12-11

申请号：DE102006022254

申请日：2006-05-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF

IPC: H01L23/16 ,  H01L21/50 ,  H01L23/28 ,  H01L23/50

Abstract: The invention relates to a semiconductor device comprising semiconductor device components embedded in plastic housing composition. The semiconductor device components partly contain copper or have copper-containing coatings and/or coating structures. The copper-containing regions of the semiconductor device components have an adhesion promoting layer with copper(II) oxide whiskers on the surfaces that are in contact with the plastic housing composition.

公开(公告)号：DE102007016061A1

公开(公告)日：2008-10-09

申请号：DE102007016061

申请日：2007-04-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF ,  SCHLOEGEL XAVER ,  LOW KHAI HUAT JEFFREY ,  LAW CHEE SOON

IPC: H01L23/49 ,  H01L21/60

Abstract: A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element.

公开(公告)号：DE102007012154A1

公开(公告)日：2008-09-25

申请号：DE102007012154

申请日：2007-03-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF

IPC: H01L25/04

Abstract: A semiconductor module has at least two semiconductor chips (4, 5) with at least one first and one second electrode (12, 13) on their first sides. Each semiconductor chip (4, 5) has a third electrode (14) on its second side (16). A chip arrangement within the semiconductor module (1) is provided such that the electrodes (12, 13) on the first sides of the semiconductor chips (4, 5) are oriented toward a second side of the semiconductor module (1) and the third electrodes (14) on the second sides (16) of the semiconductor chips (4, 5) are oriented toward a first side of the semiconductor module (1). For this purpose, external terminals (19, 20) on the second side of the semiconductor module (1) are directly coupled to the electrodes (12, 13) of the first sides and connecting elements (22) electrically couple the third electrodes (14) to corresponding external terminals (21).

公开(公告)号：DE102008008514A1

公开(公告)日：2008-08-28

申请号：DE102008008514

申请日：2008-02-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF

IPC: H01L25/16 ,  H01L23/04 ,  H01L23/15 ,  H01L23/28 ,  H01L23/34 ,  H01L25/07

Abstract: A multi-chip module is disclosed. In one embodiment, the multichip module includes a first chip, a second chip and a common chip carrier is disclosed. The first chip and the second chip are mounted on the common chip carrier. The second chip is mounted on the chip carrier in a flip-chip orientation. The second chip is electrically connected to the first chip via the chip carrier.

公开(公告)号：DE102006060484A1

公开(公告)日：2008-06-26

申请号：DE102006060484

申请日：2006-12-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOSSEINI KHALIL ,  KOENIGSBERGER ALEXANDER ,  OTREMBA RALF ,  SCHIESS KLAUS

IPC: H01L23/48 ,  H01L21/60 ,  H01L29/739 ,  H01L29/78

Abstract: A semiconductor component (1) has a semiconductor chip (5) and a semiconductor component carrier (3) with external connection strips (12, 13, 15). The semiconductor chip (5) has a first electrode (6) and a control electrode (7) on its top side (8) and a second electrode (9) on its rear side (10). The semiconductor chip (5) is fixed by its top side (8) in flip-chip arrangement (11) on a first and a second external connection strip (12, 13) for the first electrode (6) and the control electrode (7). The second electrode (9) is electrically connected to at least one third external connection strip (15) via a bonding tape (14).

公开(公告)号：DE102006018765A1

公开(公告)日：2007-10-25

申请号：DE102006018765

申请日：2006-04-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF ,  SCHLOEGEL XAVER ,  HOEGLAUER JOSEF

IPC: H01L23/488 ,  H01L21/60 ,  H01L29/861

Abstract: A power semiconductor component (2) has a semiconductor body with a front face (7) and a rear face (9). The front face (7) has a front-face metallization (8), which provides at least one first contact pad (11). A structured metal seed layer (14) is provided as the front-face metallization (8), is arranged directly on the semiconductor body, and has a thickness d, where 1 nm≦̸d≦̸0.5 μm.

公开(公告)号：DE102007006447A1

公开(公告)日：2007-08-30

申请号：DE102007006447

申请日：2007-02-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF

IPC: H01L25/07 ,  H01L23/34

Abstract: An electronic module has a heat sink with an upper surface and a lower surface, a plurality of leads arranged adjacent the heat sink and at least one circuit element with two vertical semiconductor power switches. The two vertical semiconductor power switches of each circuit element are arranged in a stack and are configured to provide a half-bridge circuit having a node defining an output. The first vertical semiconductor power switch of each of the circuit elements is mounted on the upper surface of the heat sink by an electrically conductive layer such that the lower surface of the heat sink provides the ground contact area of the electronic module.

公开(公告)号：DE102006008632A1

公开(公告)日：2007-08-30

申请号：DE102006008632

申请日：2006-02-21

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF

IPC: H01L25/07 ,  H01L23/488

Abstract: The component (1) has a vertical power semiconductor unit (2) with a contact surface that is electrically connected with a component of a chip carrier (5). A control contact surface is electrically connected with another component of the chip carrier. A diode is arranged on the latter contact surface of the vertical power semiconductor unit. The vertical power semiconductor unit is designed such that the bottom surface of the component of the chip carrier provides a mass contact surface of the semiconductor component. A flat conductor (6) protrudes from a plastic housing mass. An independent claim is also included for a method for manufacturing a power semiconductor component.

公开(公告)号：DE102005054872A1

公开(公告)日：2007-05-16

申请号：DE102005054872

申请日：2005-11-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OTREMBA RALF

IPC: H01L23/482 ,  H01L23/488 ,  H01L29/739 ,  H01L29/78

Abstract: The device has an electrode contact surface and a control electrode surface provided on an upper side of the device. Platings (10,11) are respectively arranged on the electrode contact surface and the control electrode surface. The thickness of the plating (10) on the electrode contact surface is 10 times more than the thickness of the plating (11) on the control electrode surface. A diffusion solder layer (20) is arranged on the outer surface of the plating. An independent claim is also included for a method for manufacturing a vertical power semiconductor device.