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公开(公告)号:CA2714748C
公开(公告)日:2013-07-16
申请号:CA2714748
申请日:2010-09-08
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , LIM HYOUNGSOO , KIM HEUNG-MOOK , KANG DONGHOON , OH WANGROK
Abstract: A transmitter for transmitting data in a communication system includes: a serial/parallel (S/P) conversion unit configured to convert data into an I signal and a Q signal; multiplication units configured to multiply the converted I and Q signals by orthogonal sequences, respectively; conversion units configured to Hilbert-transform the I and Q signals multiplied by the orthogonal sequences; addition units configured to add the I and Q signals multiplied by the orthogonal sequences and the Hilbert-transformed Q and I signal, respectively; and an intermediate frequency (IF)/radio frequency (RF) unit configured to up-convert the added I signal and the added Q signal and transmit the converted I and Q signals.
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公开(公告)号:CA2670747A1
公开(公告)日:2008-06-12
申请号:CA2670747
申请日:2007-11-30
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: LIM JONG-SOO , SEO JAE-HYUN , LEE YONG-TAE , LEE SOO-IN , KIM HEUNG-MOOK , LEE JAE-YOUNG , EUM HO-MIN , PARK SUNG-IK
IPC: H04L25/20
Abstract: Provided are a distributed repeater for repeating output signals identica l to input signals through a channel different from that of main transmitter signals but identical to channels of other distributed repeaters, and a dis tributed repeating method thereof. The distributed repeater includes: a pre- processing unit configured to receive a radio frequency (RF) signal transmit ted from an external device and demodulate the RF signal into a baseband sig nal; an equalizer configured to equalize the baseband signal to correct a di stortion occurring on a transmission channel; an identification signal gener ation and insertion unit configured to generate an identification signal for identification of the distributed repeater and network conditioning, and in sert the identification signal in the equalized baseband signal; and a post- processing unit configured to convert the baseband signal from the identific ation signal generation and insertion unit into an RF signal, and send the R F signal.
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公开(公告)号:MXPA06013059A
公开(公告)日:2007-02-14
申请号:MXPA06013059
申请日:2005-05-12
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM SEUNG-WON , PARK SUNG-IK , LEE YONG-TAE , EUM HO-MIN , SEO JAE-HYUN , LEE SOO-IN , KIM HEUNG-MOOK
Abstract: Se proporciona un aparato de sincronizacion de frecuencia y un metodo que puede sincronizar las frecuencias entre las senales de recepcion y las senales de transmision mediante extraer un error de portador y la informacion del error de regulacion de muestreo en un proceso de sincronizacion de la senal de recepcion desde un transmisor principal u otro repetidor y reflejarlos en la senal de transmision en un repetidor de canal activo. El aparato incluye un medio de recuperacion del portador para compensar un error de frecuencia del portador de una senal de recepcion; un medio de recuperacion de regulacion para compensar un error de regulacion de muestreo de la senal de recepcion; un medio reflector del error del portador para reflectar el error de frecuencia del portador extraido desde el medio de recuperacion del portador a una senal de transmision y un medio reflector del error de regulacion para reflejar el error de regulacion de muestreo extraido desde el medio de recuperacion de regulacion a la senal de transmision. La presente invencion se usa para formar una red de repeticion de canal activo en cualquier sistema de transmision incluyendo un sistema de transmision de television digital.
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公开(公告)号:CA2564044A1
公开(公告)日:2005-12-08
申请号:CA2564044
申请日:2005-05-12
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: KIM SEUNG-WON , EUM HO-MIN , LEE YONG-TAE , KIM HEUNG-MOOK , SEO JAE-HYUN , PARK SUNG-IK , LEE SOO-IN
Abstract: Provided is a frequency synchronizing apparatus and method that can synchronize frequencies between receiving signals and transmitting signals b y extracting a carrier error and sampling timing error information in a synchronization process of the receiving signal from a main transmitter or another repeater and reflecting them in the transmitting signal in an on- channel repeater. The apparatus includes a carrier recovery means for compensating a carrier frequency error of a receiving signal; a timing recovery means for compensating a sampling timing error of the receiving signal; a carrier error reflecting means for reflecting the carrier frequenc y error extracted from the carrier recovery means to a transmitting signal; an d a timing error reflecting means for reflecting the sampling timing error extracted from the timing recovery means to the transmitting signal. The present invention is used to form an on-channel repeating network in any transmission system including a digital television broadcasting system.
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公开(公告)号:CA2864718A1
公开(公告)日:2016-02-14
申请号:CA2864718
申请日:2014-09-25
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KIM HEUNG-MOOK , KWON SUN-HYOUNG , HUR NAM-HO
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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公开(公告)号:CA2864694A1
公开(公告)日:2016-02-14
申请号:CA2864694
申请日:2014-09-25
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KWON SUN-HYOUNG , HUR NAM-HO , KIM HEUNG-MOOK
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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公开(公告)号:CA2892103A1
公开(公告)日:2015-11-22
申请号:CA2892103
申请日:2015-05-21
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KWON SUN-HYOUNG , LIM BO-MI , LEE JAE-YOUNG , KIM HEUNG-MOOK , HUR NAM-HO
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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公开(公告)号:MX2015001936A
公开(公告)日:2015-10-26
申请号:MX2015001936
申请日:2015-02-12
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KIM HEUNG-MOOK , KWON SUN-HYOUNG , HUR NAM-HO , LEE JAE-YOUNG
IPC: H04N19/36
Abstract: Se divulgan un modulador y un método de modulación que usan una constelación de señal de 16 símbolos no uniforme; el modulador incluye una memoria y un procesador; la memoria recibe una palabra código que corresponde con un código de verificación de paridad de baja densidad (LDPC) que tiene una tasa de código de 7/15; el procesador mapea la palabra código a 16 símbolos de la constelación de señal de 16 símbolos no uniforme sobre una base de 4 bits.
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公开(公告)号:MX2014012121A
公开(公告)日:2015-08-19
申请号:MX2014012121
申请日:2014-10-07
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KIM HEUNG-MOOK , KWON SUN-HYOUNG , HUR NAM-HO
Abstract: Se describe un codificador de revisión de paridad de baja densidad (LDPC), un decodificador de LDPC y un método codificador de LDPC; el codificador de LDPC incluye una primera memoria, una segunda memoria y un procesador; la primera memoria almacena una palabra código de LDPC que tiene una longitud de 64800 y un índice de código de 7/15; la segunda memoria es inicializada a 0; el procesador genera la palabra código de LDPC que corresponde a los bits de información al realizar acumulación con respecto a la segunda memoria al usar una secuencia que corresponde a una matriz de revisión de paridad (PCM).
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公开(公告)号:CA2881540A1
公开(公告)日:2015-08-13
申请号:CA2881540
申请日:2015-02-11
Applicant: KOREA ELECTRONICS TELECOMM
Inventor: PARK SUNG-IK , KWON SUN-HYOUNG , LEE JAE-YOUNG , KIM HEUNG-MOOK , HUR NAM-HO
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
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