公开(公告)号：US20170297904A1

公开(公告)日：2017-10-19

申请号：US15205619

申请日：2016-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shiang-Chi Lin ,  Jung-Huei Peng ,  Yu-Chia Liu ,  Yi-Chien Wu

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0038 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/04 ,  B81B2207/012 ,  B81B2207/07 ,  B81C1/00285 ,  B81C2201/013 ,  B81C2201/016 ,  B81C2203/0109 ,  B81C2203/035 ,  B81C2203/0714 ,  B81C2203/0792

Abstract: A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.

公开(公告)号：US09663349B2

公开(公告)日：2017-05-30

申请号：US14935296

申请日：2015-11-06

Applicant: InvenSense, Inc.

Inventor： Jongwoo Shin ,  Houri Johari-Galle ,  Martin Lim ,  Joseph Seeger

IPC: H01L29/84 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0089 ,  B81B7/0038 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0315 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/00206 ,  B81C2201/016 ,  B81C2203/035

Abstract: A MEMS device and method for providing a MEMS device are disclosed. In a first aspect, the MEMS device comprises a first substrate and a second substrate coupled to the first substrate forming a sealed enclosure. A moveable structure is located within the sealed enclosure. An outgassing layer is formed on the first or second substrates and within the sealed enclosure. A first conductive layer is disposed between the moveable structure and the outgassing layer, wherein the first conductive layer allows outgassing species to pass therethrough.

公开(公告)号：US20160091713A1

公开(公告)日：2016-03-31

申请号：US14502255

申请日：2014-09-30

Applicant: PIXTRONIX, INC.

Inventor： Teruo Sasagawa

IPC: G02B26/02 ,  G09G5/10 ,  B81C1/00

CPC classification number: G02B26/02 ,  B81B2201/047 ,  B81C1/00039 ,  B81C1/00142 ,  B81C1/0015 ,  B81C1/00952 ,  B81C2201/013 ,  B81C2201/016 ,  G02B26/0841 ,  G02B26/0858 ,  G09G3/3433 ,  G09G5/10 ,  G09G2300/04

Abstract: This disclosure provides systems, methods and apparatus including devices that include a layer of passivation material covering at least a portion of an exterior surface of a thin film component within a microelectomechanical device. The thin film component may include an electrically conductive layer that connects via an anchor to a conductive surface on a substrate. The disclosure further provides processes for providing a layer of passivation material on an exterior surface of a thin film component and for electrically connecting that thin film component to a conductive surface on a substrate.

Abstract translation: 本公开提供了包括装置的系统，方法和装置，其包括覆盖微机电装置内的薄膜部件的外表面的至少一部分的钝化材料层。 薄膜部件可以包括通过锚固件连接到基板上的导电表面的导电层。 本公开还提供了在薄膜部件的外表面上提供钝化材料层并将该薄膜部件电连接到基板上的导电表面的方法。

公开(公告)号：US09233842B2

公开(公告)日：2016-01-12

申请号：US14201247

申请日：2014-03-07

Applicant: Robert Bosch GmbH

Inventor： Ando Lars Feyh ,  Fabian Purkl ,  Andrew Graham ,  Gary Yama

IPC: H01L21/31 ,  B81C1/00 ,  H01L23/31 ,  H01L21/314 ,  H01L45/00 ,  H01L21/02

CPC classification number: B81C1/00809 ,  B81C2201/016 ,  H01L21/02601 ,  H01L23/3192 ,  H01L45/146 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a passivation layer and a passivation layer for an electronic device. The passivation layer includes at least one passivation film layer and at least one nanoparticle layer. A first film layer is formed of an insulating matrix, such as aluminum oxide (Al2O3) and a first layer of a noble metal nanoparticle layer, such as a platinum nanoparticle layer, is deposited on the first film layer. Additional layers are formed of alternating film layers and nanoparticle layers. The resulting passivation layer provides a thin and robust passivation layer of high film quality to protect electronic devices, components, and systems from the disruptive environmental conditions.

Abstract translation: 一种制造用于电子设备的钝化层和钝化层的方法。 钝化层包括至少一个钝化膜层和至少一个纳米颗粒层。 第一膜层由诸如氧化铝（Al2O3）的绝缘基体形成，并且第一层金属纳米颗粒层（例如铂纳米颗粒层）沉积在第一膜层上。 附加层由交替的膜层和纳米颗粒层形成。 所得到的钝化层提供了一种具有高膜质量的薄且坚固的钝化层，以保护电子设备，部件和系统免受破坏性环境条件的影响。

公开(公告)号：US08030112B2

公开(公告)日：2011-10-04

申请号：US12691754

申请日：2010-01-22

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Jhyy-Cheng Liou

IPC: H01L21/00

CPC classification number: B81C1/00246 ,  B81B2203/0315 ,  B81B2207/015 ,  B81C2201/016 ,  B81C2203/0714 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00

Abstract: A method for fabricating MEMS device includes: providing a single crystal substrate, having first surface and second surface and having a MEMS region and an IC region; forming SCS mass blocks on the first surface in the MEMS region; forming a structural dielectric layer over the first surface of the substrate, wherein a dielectric member of the structural dielectric layer is filled in spaces surrounding the SCS mass blocks in the MEMS region, the IC region has a circuit structure with an interconnection structure formed in the structural dielectric layer; patterning the single crystal substrate by an etching process on the second surface to expose a portion of the dielectric member filled in the spaces surrounding the SCS mass blocks; performing isotropic etching process at least on the dielectric portion filled in the spaces surrounding the SCS mass blocks. The SCS mass blocks are exposed to release a MEMS structure.

Abstract translation: 一种制造MEMS器件的方法包括：提供具有第一表面和第二表面并具有MEMS区域和IC区域的单晶衬底; 在MEMS区域的第一表面上形成SCS质量块; 在所述基板的所述第一表面上形成结构介电层，其中所述结构介电层的电介质部件填充在所述MEMS区域中围绕所述SCS质量块的空间中，所述IC区域具有形成在所述MEMS区域中的互连结构的电路结构 结构介电层; 通过在第二表面上的蚀刻工艺对单晶衬底进行图案化，以暴露填充在围绕SCS质量块的空间中的电介质构件的一部分; 至少在填充在SCS质量块周围的空间中的电介质部分上进行各向同性蚀刻处理。 暴露SCS质量块以释放MEMS结构。

公开(公告)号：US20100320548A1

公开(公告)日：2010-12-23

申请号：US12813117

申请日：2010-06-10

Applicant: Christine H. Tsau ,  Thomas Kieran Nunan

Inventor： Christine H. Tsau ,  Thomas Kieran Nunan

IPC: H01L29/84 ,  H01L21/30 ,  H01L21/318 ,  H01L29/06

CPC classification number: G01P15/125 ,  B81C1/0019 ,  B81C1/00595 ,  B81C2201/0109 ,  B81C2201/014 ,  B81C2201/016 ,  B81C2201/053 ,  G01P15/0802 ,  H01L21/31116

Abstract: A thin silicon-rich nitride film (e.g., having a thickness in the range of around 100A to 10000A) deposited using low-pressure chemical vapor deposition (LPCVD) is used for etch stop during vapor HF etching in various MEMS wafer fabrication processes and devices. The LPCVD silicon-rich nitride film may replace, or be used in combination with, a LPCVD stoichiometric nitride layer in many existing MEMS fabrication processes and devices. The LPCVD silicon-rich nitride film is deposited at high temperatures (e.g., typically around 650-900 degrees C.). Such a LPCVD silicon-rich nitride film generally has enhanced etch selectivity to vapor HF and other harsh chemical environments compared to stoichiometric silicon nitride and therefore a thinner layer typically can be used as an embedded etch stop layer in various MEMS wafer fabrication processes and devices and particularly for vapor HF etching processes, saving time and money in the fabrication process.

Abstract translation: 使用低压化学气相沉积（LPCVD）沉积的薄的富硅氮化物膜（例如，厚度在约100A至10000A的范围内）用于各种MEMS晶片制造工艺和器件中的蒸气HF蚀刻期间的蚀刻停止 。 LPCVD富硅氮化物膜可以在许多现有的MEMS制造工艺和器件中替代或与其组合使用LPCVD化学计量氮化物层。 LPCVD富硅氮化物膜在高温（例如典型地约650-900℃）下沉积。 与化学计量的氮化硅相比，这种LPCVD富硅氮化物膜通常对蒸汽HF和其它恶劣的化学环境具有增强的蚀刻选择性，因此较薄的层通常可用作各种MEMS晶片制造工艺和器件中的嵌入式蚀刻停止层， 特别是对于蒸汽HF蚀刻工艺，节省了制造过程中的时间和金钱。

公开(公告)号：US07288424B2

公开(公告)日：2007-10-30

申请号：US10720498

申请日：2003-11-24

Applicant: James A. Hunter ,  Charles B. Roxlo ,  Alexander Payne

Inventor： James A. Hunter ,  Charles B. Roxlo ,  Alexander Payne

IPC: H01L21/00

CPC classification number: G02B26/0808 ,  B81B2201/045 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/016 ,  B81C2203/0735 ,  B81C2203/0778 ,  H01L27/0611

Abstract: An integrated device includes one or more device drivers and a micro-electro-mechanical system (MEMS) structure monolithically coupled to the one or more device drivers. The one or more device drivers are configured to process received control signals and to transmit the processed control signals to the MEMS structure. Methods of fabricating integrated devices are also disclosed.

Abstract translation: 集成器件包括一个或多个器件驱动器和与该一个或多个器件驱动器单片耦合的微机电系统（MEMS）结构。 一个或多个设备驱动器被配置为处理接收的控制信号并将经处理的控制信号传送到MEMS结构。 还公开了制造集成器件的方法。

公开(公告)号：US20060108576A1

公开(公告)日：2006-05-25

申请号：US10524610

申请日：2003-05-06

Applicant: Franz Laermer ,  Lutz Mueller ,  Winfried Bernhard

Inventor： Franz Laermer ,  Lutz Mueller ,  Winfried Bernhard

IPC: H01L29/08

CPC classification number: H01L21/02252 ,  B81B2203/033 ,  B81C1/00571 ,  B81C2201/016 ,  H01L21/02123 ,  H01L21/02238 ,  H01L21/02337 ,  H01L21/02343 ,  H01L21/02359 ,  H01L21/3121 ,  H01L21/31612 ,  Y10S438/958

Abstract: A layer system is described including a silicon layer and a passivation layer which is applied at least regionally to the silicon layer's surface, the passivation layer having a first, at least largely inorganic partial layer and a second partial layer, the second partial layer being made of an organic compound including silicon or containing such a material. In particular, the second partial layer is structured in the form of a “self-assembled monolayer.” Furthermore, a method is described for creating a passivation layer on a silicon layer, a first, inorganic partial layer being created on the silicon layer and a second partial layer, containing an organic compound including silicon or being made thereof, being created at least in certain areas on the first partial layer. Both partial layers form the passivation layer. The described layer system or the described method is particularly suited for creating self-supporting structures in silicon.

Abstract translation: 描述了一种层系统，其包括至少区域地施加到硅层表面的硅层和钝化层，钝化层具有第一至少大部分无机部分层和第二部分层，第二部分层被制成 包含硅或含有这种材料的有机化合物。 特别地，第二部分层以“自组装单层”的形式构成。 此外，描述了一种用于在硅层上形成钝化层的方法，在硅层上形成第一无机部分层，以及第二部分层，其含有包含硅或由其形成的有机化合物，至少在 第一部分图层上的某些区域。 两个部分层形成钝化层。 所描述的层系统或所描述的方法特别适用于在硅中产生自支撑结构。

公开(公告)号：US20050052092A1

公开(公告)日：2005-03-10

申请号：US10492896

申请日：2002-09-05

Applicant: Franz Laermer

Inventor： Franz Laermer

IPC: B81B3/00 ,  B81C1/00 ,  G01C19/5712 ,  G01P15/00 ,  H01L41/08

CPC classification number: G01C19/5712 ,  B81B3/0086 ,  B81B2201/0242 ,  B81B2203/0136 ,  B81B2203/033 ,  B81C1/00801 ,  B81C2201/0104 ,  B81C2201/016

Abstract: A micromechanical component and a method for producing the component are provided. The micromechanical component includes a substrate and a micromechanical functional layer of a first material provided over the substrate. The functional layer has a first and second regions, which are connected by a third region of a second material, and at least one of the regions is part of a movable structure, which is suspended over the substrate.

Abstract translation: 提供微机械部件及其制造方法。 微机械部件包括衬底和设置在衬底上的第一材料的微机械功能层。 功能层具有通过第二材料的第三区域连接的第一和第二区域，并且至少一个区域是悬浮在基板上的可移动结构的一部分。

公开(公告)号：US20030068838A1

公开(公告)日：2003-04-10

申请号：US09975125

申请日：2001-10-09

Inventor： Jin-shown Shie ,  Ji-cheng Lin ,  Chune-te Lin ,  Chih-tang Peng ,  Shih-han Yu ,  Kuo-ning Chiang

IPC: H01L021/00 ,  H01L029/82

CPC classification number: B81C1/00182 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/014 ,  B81C2201/016 ,  G01L9/0054

Abstract: The invention is a silicon pressure micro-sensing device and the fabrication process thereof. The silicon pressure micro-sensing device includes a pressure chamber, and is constituted of a P-type substrate with a taper chamber and an N-type epitaxial layer thereon. On the N-type epitaxial layer are a plurality of piezo-resistance sensing units which sense deformation caused by pressure. The fabrication pressure of the silicon pressure micro-sensing device includes a step of first making a plurality of holes on the N-type epitaxial layer to reach the P-type substrate beneath. Then, by an anisotropic etching stop technique, in which etchant pass through the holes, a taper chamber is formed in the P-type substrate. Finally, an insulating material is applied to seal the holes, thus attaining the silicon pressure micro-sensing device that is able to sense pressure differences between two ends thereof.

Abstract translation: 本发明是一种硅压力微型感测装置及其制造方法。 硅压力微型感测装置包括压力室，由具有锥形室的P型衬底和其上的N型外延层构成。 在N型外延层上是感测由压力引起的变形的多个压电感测单元。 硅压力微型感测装置的制造压力包括首先在N型外延层上制造多个孔以到达下面的P型衬底的步骤。 然后，通过各向异性蚀刻停止技术，其中蚀刻剂穿过孔，在P型衬底中形成锥形室。 最后，施加绝缘材料以密封孔，从而获得能够感测其两端之间的压力差的硅压力微检测装置。