公开(公告)号：EP1943184A1

公开(公告)日：2008-07-16

申请号：EP06808404.5

申请日：2006-11-02

Applicant: CAVENDISH KINETICS LIMITED

Inventor： VAN KAMPEN, Robert ,  KAZINCZI, Robert

IPC: B81B3/00 ,  G11C23/00 ,  G11C11/50 ,  H01H1/00

CPC classification number: H01H59/0009 ,  B81C1/0015 ,  B81C2201/014 ,  B81C2201/0176 ,  G11C23/00 ,  H01H51/12

Abstract: A non-volatile memory device and method of manufacturing a non-volatile micro-electromechanical memory cell. The method comprises the first step of depositing a first layer of sacrificial material on a substrate by use of Atomic Layer Deposition The second step of the method is providing a cantilever (101) over at least a portion of the first layer of sacrificial material. The third step is depositing, by use of Atomic Layer Deposition, a second layer of sacrificial material over the first layer of sacrificial material and over a portion of the cantilever such that a portion of the cantilever is surrounded by sacrificial material. The fourth step is providing a further layer material (107) which covers at least a portion of the second layer of sacrificial material. Finally, the last step is etching away the sacrificial material surrounding the cantilever, thereby defining a cavity (102) in which the cantilever is suspended.

公开(公告)号：WO2015050688A1

公开(公告)日：2015-04-09

申请号：PCT/US2014/055581

申请日：2014-09-15

Applicant: CAVENDISH KINETICS, INC

Inventor： RENAULT, Mickael

IPC: B81C1/00

CPC classification number: B81C1/0038 ,  B81C1/00801 ,  B81C2201/0108 ,  B81C2201/0176 ,  B81C2201/053

Abstract: The present invention generally relates to a method for forming a MEMS device and a MEMS device formed by the method. When forming the MEMS device, sacrificial material is deposited around the switching element within the cavity body. The sacrificial material is eventually removed to free the switching element in the cavity. The switching element has a thin dielectric layer thereover to prevent etchant interaction with the conductive material of the switching element. During fabrication, the dielectric layer is deposited over the sacrificial material. To ensure good adhesion between the dielectric layer and the sacrificial material, a silicon rich silicon oxide layer is deposited onto the sacrificial material before depositing the dielectric layer thereon.

Abstract translation: 本发明一般涉及用于形成MEMS器件的方法和通过该方法形成的MEMS器件。 当形成MEMS器件时，牺牲材料沉积在腔体内的开关元件周围。 牺牲材料最终被去除以释放空腔中的开关元件。 开关元件在其上具有薄的电介质层，以防止蚀刻剂与开关元件的导电材料的相互作用。 在制造期间，介电层沉积在牺牲材料上。 为了确保电介质层和牺牲材料之间的良好粘合性，在沉积其上的电介质层之前，将富硅氧化硅层沉积到牺牲材料上。

公开(公告)号：WO2013020080A1

公开(公告)日：2013-02-07

申请号：PCT/US2012/049587

申请日：2012-08-03

Applicant: ROBERT BOSCH GMBH ,  FEYH, Ando ,  CLASSEN, Johannes

Inventor： FEYH, Ando ,  CLASSEN, Johannes

IPC: B81B3/00

CPC classification number: B81B3/0086 ,  B81B3/0008 ,  B81C2201/0169 ,  B81C2201/017 ,  B81C2201/0176

Abstract: In one embodiment, a method of forming a MEMS device includes providing a substrate, forming a sacrificial layer above the substrate layer, forming a silicon based working portion on the sacrificial layer, releasing the silicon based working portion from the sacrificial layer such that the working portion includes at least one exposed outer surface, forming a first layer of silicide forming metal on the at least one exposed outer surface of the silicon based working portion, and forming a first silicide layer with the first layer of silicide forming metal.

Abstract translation: 在一个实施例中，形成MEMS器件的方法包括提供衬底，在衬底层上形成牺牲层，在牺牲层上形成硅基工作部分，从牺牲层释放硅基工作部分，使得工作 部分包括至少一个暴露的外表面，在硅基工作部分的至少一个暴露的外表面上形成第一层硅化物形成金属，以及形成具有第一层硅化物形成金属的第一硅化物层。

公开(公告)号：WO2012162271A2

公开(公告)日：2012-11-29

申请号：PCT/US2012/038899

申请日：2012-05-21

Applicant: UNIVERSITY OF UTAH RESEARCH FOUNDATION ,  TABIB-AZAR, Massood

Inventor： TABIB-AZAR, Massood

IPC: H01L21/027 ,  G03F7/20

CPC classification number: B81C1/00373 ,  B81C2201/0176 ,  B81C2201/0188 ,  C23C16/01 ,  C23C16/04 ,  C23C16/047 ,  C23C16/46 ,  G01Q10/045 ,  G01Q20/04 ,  G01Q80/00 ,  H01L29/0665

Abstract: A method of fabricating an integrated circuit includes forming (52) a metallic trace over a substrate. Resonance in the metallic trace can be induced (54), resulting in a resonating metallic trace and a localized heated target deposition region. A semiconductor material can be deposited on the target deposition region via gas decomposition (56) of a semiconductor precursor gas.

Abstract translation: 一种制造集成电路的方法包括在衬底上形成（52）金属迹线。 可以诱导金属痕迹的共振（54），导致共振的金属痕迹和局部加热的目标沉积区域。 半导体材料可以通过半导体前体气体的气体分解（56）沉积在靶沉积区上。

公开(公告)号：WO2017162889A1

公开(公告)日：2017-09-28

申请号：PCT/EP2017/057180

申请日：2017-03-27

Applicant: ROBERT BOSCH GMBH

Inventor： SAMARAO, Ashwin ,  YEE, Seow Yuen ,  YAMA, Gary

IPC: B81C1/00

CPC classification number: B81B7/0058 ,  B81B2201/0207 ,  B81B2201/0214 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0278 ,  B81B2201/0292 ,  B81B2201/047 ,  B81C1/00206 ,  B81C1/0038 ,  B81C2201/0176 ,  B81C2201/0181 ,  C23C16/22 ,  C23C16/45527

Abstract: System and method for forming an ALD assembly on a surface of a microelectromechanical system (MEMS) device comprises a substrate having a surface and the ALD assembly is at least partially disposed on the surface of the substrate, wherein the ALD assembly is at least one of hydrophobic and hydrophilic properties. The ALD layer further includes a first ALD and a second ALD. On the surface of the substrate, the first ALD is deposited in a first deposition cycle and the second ALD is deposited in a second deposition cycle. The ALD assembly further comprises a seed layer formed using atomic layer deposition and the ALD layer is at least partially disposed on the seed layer. In one example, the seed layer is formed from alumina (Al 2 O 3 ) and the ALD layer is formed from platinum (Pt). In alternate embodiment, on the seed layer, the first ALD is deposited in a first deposition cycle and the second ALD is deposited in a subsequent deposition cycle. The substrate is formed from silicon dioxide (SiO 2 ).

Abstract translation: 用于在微机电系统（MEMS）器件的表面上形成ALD组件的系统和方法包括具有表面的衬底，并且ALD组件至少部分地设置在衬底的表面上，其中 ALD组件是疏水性和亲水性中的至少一种。 ALD层还包括第一ALD和第二ALD。 在衬底的表面上，在第一沉积循环中沉积第一ALD，并且在第二沉积循环中沉积第二ALD。 ALD组件还包括使用原子层沉积形成的种子层，并且ALD层至少部分地设置在种子层上。 在一个实例中，籽晶层由氧化铝（Al 2 O 3：3）形成并且ALD层由铂（Pt）形成。 在替代实施例中，在种子层上，第一ALD在第一沉积循环中沉积并且第二ALD在随后的沉积循环中沉积。 衬底由二氧化硅（SiO 2）形成。

公开(公告)号：WO2012162271A3

公开(公告)日：2013-03-28

申请号：PCT/US2012038899

申请日：2012-05-21

Applicant: UNIV UTAH RES FOUND ,  TABIB-AZAR MASSOOD

Inventor： TABIB-AZAR MASSOOD

IPC: H01L21/027 ,  G03F7/20

CPC classification number: B81C1/00373 ,  B81C2201/0176 ,  B81C2201/0188 ,  C23C16/01 ,  C23C16/04 ,  C23C16/047 ,  C23C16/46 ,  G01Q10/045 ,  G01Q20/04 ,  G01Q80/00 ,  H01L29/0665

Abstract: A method of fabricating an integrated circuit includes forming (52) a metallic trace over a substrate. Resonance in the metallic trace can be induced (54), resulting in a resonating metallic trace and a localized heated target deposition region. A semiconductor material can be deposited on the target deposition region via gas decomposition (56) of a semiconductor precursor gas.

Abstract translation: 一种制造集成电路的方法包括在衬底上形成（52）金属迹线。 可以诱导金属痕迹的共振（54），导致共振的金属痕迹和局部加热的目标沉积区域。 半导体材料可以通过半导体前体气体的气体分解（56）沉积在靶沉积区上。

公开(公告)号：WO98055876A1

公开(公告)日：1998-12-10

申请号：PCT/DE1998/001075

申请日：1998-04-17

IPC: G01P15/125 ,  B81B3/00 ,  B81B7/00 ,  B81C1/00 ,  G01P1/02 ,  G01P15/08

CPC classification number: G01P15/0802 ,  B81B3/0005 ,  B81C1/0096 ,  B81C2201/0176 ,  B81C2201/112 ,  G01P1/023

Abstract: The invention relates to a method for producing micromechanical components or a micromechanical component. According to the invention, a moveable element (4) is produced on a sacrificial layer (2). The sacrificial layer (2) under the moveable element (4) is then removed, so that said moveable element (4) is able to move. After the sacrificial layer (2) has been removed, a protective layer (7) is deposited on a surface of the moveable element (4). Silicon oxide and/or silicon nitride are used for the protective layer (7).

Abstract translation: 它提出了一种用于制造微机械部件或微机械部件，其中产生一个牺牲层（2）上的可动构件（4）的方法。 在随后的步骤中，可移动元件（4）根据所述牺牲层（2）被移除，使得所述可动构件（4）是可移动的。 去除所述牺牲层（2）后可动构件（4）的表面上形成保护层（7）沉积。 用于保护层（7）被用于氧化硅和/或氮化硅。

公开(公告)号：EP3214037A4

公开(公告)日：2018-05-30

申请号：EP15762910

申请日：2015-04-15

Applicant: BOE TECHNOLOGY GROUP CO LTD

Inventor： JI CHUNYAN ,  YANG TIAN

IPC: B81C1/00 ,  H01L41/00

CPC classification number: B81B3/0021 ,  B81B2203/0109 ,  B81B2203/0127 ,  B81C1/00142 ,  B81C1/00158 ,  B81C2201/013 ,  B81C2201/0176 ,  B81C2201/0181 ,  C23C14/0605 ,  C23C14/0617 ,  C23C14/14 ,  C23C14/34 ,  F24J2/5203 ,  F24J2/5258 ,  F24J2002/5215 ,  F24J2002/5226 ,  F24J2002/5284 ,  F24S25/30 ,  F24S25/636 ,  F24S2025/016 ,  F24S2025/801 ,  F24S2025/807 ,  G01F1/56 ,  G01J1/42 ,  H02S20/00 ,  Y02E10/47 ,  Y02E10/50

Abstract: The present invention relates to the field of sensor manufacturing technology, particularly disloses a method for manufacturing a micro-sensor body, compriseing the steps of S1: applying a wet colloidal material on a substrate to form a colloidal layer, and covering a layer of one-dimensional nanowire film on the surface of the colloidal layer to form a sensor embryo; S2: drying the colloidal layer of the sensor embryo to an extent that the colloidal layer cracks into a plurality of colloidal islands, a portion of the one-dimensional nanowire film contracting into a contraction diaphragm adhered to the surface of the colloidal islands while the other portion of the one-dimensional nanowire film being stretched into a connection structure connected between the adjacent contraction diaphragms. By the method for manufacturing a micro-sensor body of the present invention, the contraction diaphragms and connection structures formed by stretching the one-dimensional nanowire film are connected stably, which enhances the stability of the sensor devices; and the cracking manner renders it easy to obtain a large-scale of sensor bodies with connection structure arrays in stable suspension.

公开(公告)号：EP3060290A1

公开(公告)日：2016-08-31

申请号：EP14803185.9

申请日：2014-10-15

Applicant: Swansea University

Inventor： LUI, Yufei ,  GUY, Owen

IPC: A61M37/00 ,  B81C1/00

CPC classification number: B81C1/00111 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2201/055 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/0159 ,  B81C2201/0176 ,  B81C2201/0181 ,  C23C16/402

Abstract: A method of forming microneedles where through a series of coating and etching processes microneedles are formed from a surface as an array. The microneedles have a bevelled end and bore which are formed as part of the process with no need to use a post manufacturing process to finish the microneedle.

公开(公告)号：EP1634328A2

公开(公告)日：2006-03-15

申请号：EP04785661.2

申请日：2004-03-30

Applicant: ROBERT BOSCH GMBH

Inventor： PARTRIDGE, Aaron ,  LUTZ, Markus ,  KRONMUELLER, Silvia

IPC: H01L23/28 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/14 ,  H01L29/82 ,  H01L29/84

CPC classification number: B81C1/00261 ,  B81B2207/015 ,  B81C1/00333 ,  B81C2201/0176 ,  B81C2203/0136 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures (20a-d) encapsulated in a chamber (26) prior to final packaging. The material (28a) that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilities integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.