公开(公告)号：US20140116757A1

公开(公告)日：2014-05-01

申请号：US13663303

申请日：2012-10-29

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yu-Te Lu ,  De-Hao Lu

IPC: H05K1/05

CPC classification number: H05K1/056 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K1/0204 ,  H05K2201/029 ,  H05K2201/0323 ,  H05K2201/09054 ,  H05K2203/0323 ,  H05K2203/0384 ,  H05K2203/063 ,  H01L2924/00

Abstract: A chip support board structure which includes at least a metal substrate, a block layer, a paddle, an insulation layer, a circuit layer and a solder resist is disclosed. The circuit layer connects with the paddle. The material of the block layer is different from that of the metal substrate and the block layer is provided between the metal substrate and the paddle such that the shape and the depth of the paddle is maintained constant and the problem of different depth and easily peeling off is avoided, thereby improving the yield rate of the chip support board.

Abstract translation: 公开了至少包括金属基板，阻挡层，桨，绝缘层，电路层和阻焊剂的芯片支撑板结构。 电路层与桨连接。 阻挡层的材料与金属基板的材料不同，并且在金属基板和板之间设置阻挡层，使得桨的形状和深度保持恒定，并且具有不同深度并容易剥离的问题 从而提高了芯片支撑板的成品率。

公开(公告)号：US20140115889A1

公开(公告)日：2014-05-01

申请号：US13663274

申请日：2012-10-29

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Yu-Te Lu ,  De-Hao Lu

IPC: H05K3/10

CPC classification number: H05K3/4682 ,  H05K1/0271 ,  H05K2201/09136 ,  H05K2201/2018 ,  H05K2203/0152 ,  H05K2203/0376 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/4916

Abstract: A method of manufacturing a laminate circuit board which includes the sequential steps of metalizing the substrate to form the base layer, forming the first circuit metal layer, forming at least one insulation layer and at least one second circuit metal layer interleaved, removing the substrate, forming the support frame and forming the solder resist is disclosed. The laminate circuit board has a thickness less than 150 μm. The support frame which does not overlap the first circuit metal layer is formed on the edge of the base layer by the pattern transfer process after the substrate is removed. The base layer formed of at least one metal layer is not completely removed. The support frame provides enhanced physical support for the entire laminate circuit board without influence on the electrical connection of the circuit in the second circuit metal layer, thereby solving the warping problem.

Abstract translation: 一种叠层电路板的制造方法，其特征在于，包括使所述基板金属化以形成所述基底层的顺序步骤，形成所述第一电路金属层，形成至少一个绝缘层和交替插入的至少一个第二电路金属层，去除所述基板， 公开了形成支撑框架并形成阻焊剂的方法。 层叠电路板的厚度小于150μm。 在去除衬底之后，通过图案转印工艺在基层的边缘上形成不与第一电路金属层重叠的支撑框架。 由至少一个金属层形成的基底层没有被完全去除。 支撑框架对整个层叠电路板提供增强的物理支撑，而不影响第二电路金属层中的电路的电连接，从而解决翘曲问题。

公开(公告)号：US11495390B2

公开(公告)日：2022-11-08

申请号：US16285138

申请日：2019-02-25

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H01F27/28 ,  H05K1/03 ,  H05K1/11 ,  H05K1/16 ,  H05K3/46

Abstract: A buildup board structure incorporating magnetic induction coils and flexible boards is disclosed. The buildup board structure includes at least one first buildup unit or at least one second buildup unit. The first buildup unit includes at least one first buildup body, the second buildup unit includes at least one second buildup body. Any two adjacent buildup bodies are separated by a covering layer provided with a central hole for electrical insulation. All central holes are aligned. Each buildup body includes a plurality of flexible boards, and each flexible board is embedded with a plurality of magnetic induction coils surrounding the corresponding central hole and connected through connection pads. The first and/or second buildup bodies are easily laminated in any order by any number as desired such that the effect of magnetic induction provided by the magnetic induction coils embedded in the buildup board structure are addable to greatly enhance the overall effect of magnetic induction.

公开(公告)号：US10882296B2

公开(公告)日：2021-01-05

申请号：US16199565

申请日：2018-11-26

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Shang-Chi Wang ,  Yun-Han Yeh ,  Cyuan-Bang Wu

IPC: B32B43/00 ,  B32B38/10 ,  B65H41/00 ,  H05K3/00

Abstract: A film-peeling apparatus is adapted to peel a protective film on a surface of a substrate. The surface of the substrate has a bare area which is not covered by the protective film. The film-peeling apparatus includes a punching member, a connector connected to the punching member, and a controller. The controller is configured for driving, through the connector, the punching member to punch at predetermined positions nearby or on a first edge of the protective film adjacent to the bare area.

公开(公告)号：US20200136233A1

公开(公告)日：2020-04-30

申请号：US16175807

申请日：2018-10-30

Applicant: Kinsus Interconnect Technology Corp.

Inventor： Ting-Hao LIN ,  Yung-Lin CHIA ,  Chiao-Cheng CHANG

IPC: H01Q1/22 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H01Q1/52

Abstract: An antenna carrier plate structure has a first circuit board and a second circuit board. The first circuit board has a first substrate and a conductive connector disposed in the first substrate. The conductive connector has two opposite connecting ends respectively protruding from two opposite surfaces of the first substrate. The second circuit board has a second substrate formed with a through hole, and a connecting plug is disposed in the through hole. One end of the connecting plug is formed with an engaging concave portion for engaging one end of the conductive connector of the first substrate. Therefore, each circuit board can be firmly fixed and electrically connected by engaging to form a multi-layer circuit board module, thereby avoiding joint tolerances during soldering and ensuring a correct connection of the joints.

公开(公告)号：US10405423B2

公开(公告)日：2019-09-03

申请号：US15863605

申请日：2018-01-05

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H05K1/02 ,  H05K1/09 ,  H05K1/14 ,  H05K3/46

Abstract: A multi-layer circuit board includes a first circuit board, conducting blocks, a second circuit board, and conducting recesses. The first circuit board has a first conductor layer mounted on the first circuit board. The conducting blocks are mounted on the first circuit board and electrically connected to the first conductor layer. The second circuit board has a second conductor layer mounted thereon and facing the first circuit board. The conducting recesses are formed in the second circuit board, electrically connected to the second conductor layer, and corresponding to the respective conducting blocks. The insulating layer is mounted between the first conductor layer and the second conductor layer. The second circuit board is on the first circuit board, the conducting blocks are respectively mounted in the conducting recesses to electrically connect the first conductor layer and the second conductor layer.

公开(公告)号：US10371719B2

公开(公告)日：2019-08-06

申请号：US15130982

申请日：2016-04-17

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: G01R1/073 ,  G01R31/28

Abstract: A printed circuit board (PCB) test fixture includes a substrate, a first insulation layer formed on the substrate, a conductor layer formed on the first insulation layer and electrically connected to the upper electrodes through at least one first connection member, a second insulation layer formed on the first insulation layer, and multiple conductive cones arranged on the second insulation layer in a matrix form. A part of the conductive cones is electrically connected to the conductor layer through at least one second connection member. The circuit layout of the conductor layer, the at least one first connection member and the at least one second connection member is employed to supply testing power to a part of the conductive cones and an adjustable arrangement of the conductive cones to enhance density of test probes upon electrical testing.

公开(公告)号：US20190180919A1

公开(公告)日：2019-06-13

申请号：US16280435

申请日：2019-02-20

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H01F27/28 ,  H05K3/00 ,  H05K1/00 ,  H05K3/46 ,  H05K1/16 ,  H01F41/04

CPC classification number: H01F27/2804 ,  H01F41/041 ,  H01F2027/2809 ,  H05K1/00 ,  H05K1/165 ,  H05K3/00 ,  H05K3/4635 ,  H05K2201/09063

Abstract: A method of manufacturing a winged coil structure is provided. The method includes preparing an upper flexible plate having a middle region and two side regions bordering the middle region; preparing a dielectric layer with a lateral size of the dielectric layer being the same as a lateral size of the middle region of the upper flexible plate; preparing a lower flexible plate having a middle region and two side regions bordering the middle region; preparing a bottom flexible plate attached to the lower surface of the lower flexible plate to form a stack body; and performing a process of thermal pressing to sequentially from bottom to top stack and combine the stack body, the dielectric layer, and the upper flexible plate as a multiple layered stack structure via a press mold.

公开(公告)号：US20190059153A1

公开(公告)日：2019-02-21

申请号：US15826692

申请日：2017-11-30

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Chin-Kuan Liu ,  Chao-Lung Wang ,  Shuo-Hsun Chang ,  Yu-Te Lu ,  Chin-Hsi Chang

IPC: H05K1/02 ,  H05K1/09 ,  H05K3/46 ,  H05K3/06

CPC classification number: H05K1/0268 ,  H05K1/09 ,  H05K3/064 ,  H05K3/4644 ,  H05K3/4661 ,  H05K3/467 ,  H05K2201/0302 ,  H05K2203/072 ,  H05K2203/0723

Abstract: A multi-layer circuit board capable of being applied with electrical testing includes a patterned metal-interface layer, a metallic delivery loading plate, an electrical connection layer, a conductive corrosion-barrier layer, a bottom dielectric layer, and a multi-layer circuit structure. The multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer. The top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. The delivery loading plate and the patterned metal-interface layer expose the conductive corrosion-barrier layer. Therefore, before the multi-layer circuit board is packaged, an electrical testing can be applied to the multi-layer circuit board to check if it can be operated normally. Hence, costs for figuring out reasons of the unqualified electronic component can be reduced, and responsibilities for the unqualified electrical testing result of the electronic component can be clarified.

公开(公告)号：US20180160533A1

公开(公告)日：2018-06-07

申请号：US15369822

申请日：2016-12-05

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao LIN ,  Chiao-Cheng CHANG ,  Yi-Nong LIN

IPC: H05K1/14 ,  H05K1/02 ,  H05K3/36 ,  H05K3/46

CPC classification number: H05K3/4641 ,  H05K3/4647 ,  H05K3/4682 ,  H05K2201/10242 ,  H05K2203/041 ,  H05K2203/0568

Abstract: A multilayer printed circuit board includes a first circuit board, a second circuit board and bonding films. The first circuit board includes a first dielectric layer, a first wiring pattern layer, a plurality of conductive blocks and a plurality of solder balls. The first wiring pattern layer is formed on a first surface of the first dielectric layer and the conductive blocks are formed on a second surface of the first dielectric layer. The solder balls are formed on a surface of the first wiring pattern layer. The second circuit board includes a second dielectric layer, a second wiring pattern layer, second conductive blocks and conductive pillars. The second wiring pattern layer is formed on a third surface of the second dielectric layer and the second conductive blocks are formed on a fourth surface thereof. The conductive pillars are formed on the second wiring pattern layer.