Abstract:
An improved target association method including the steps of: a) generating a matrix of cost functions having n rows corresponding to n targets from a first frame of data and m columns corresponding to m targets in a second frame of data, each cost function being either a function of one of n targets in a first frame of data and one of m targets in a second frame of data, or a dummy value; b) ordering the rows of said matrix; c) associating, for each row in accordance with said order of said rows, the target corresponding to the row with the target corresponding to the column, not previously associated, having the smallest cost function so that each target from said first frame of data is optimally associated with a single target in said second frame of data.
Abstract:
A radar test set target which is co-located with the radar and produces a faithful replica of the radar signal substantially delayed in time. The radar signal modulates a laser light which is controllable delayed in time by transmitting the modulated laser light through a fiber optic delay line. The output of the delay line is demodulated and the extracted and delayed radar signal is returned to the radar as a test signal.
Abstract:
An embedded polarizing beamsplitter (118) employed in a liquid crystal light valve color projector introduces lateral chromatic aberration of complex distribution that degrades contrast and resolution of the projected image. Color correction is provided to substantially eliminate any noticeable lateral chromatic aberration by replacing the output window of the prism with an optical wedge (127) made of the same material as the embedded prism plate (116) of the beamsplitter.
Abstract:
A nickel-hydrogen electrical storage cell (10) contains a nickel positive electrode (14), a hydrogen negative electrode (16), a separator (18) between the electrodes (14 and 16), and electrolyte including a rubidium hydroxide and cesium hydroxide, and a pressure vessel to contain these elements. The cell (10) is expected to operate for extended cycle life in deep discharge conditions based upon extrapolations of accelerated life testing results. The electrolyte may be essentially entirely rubidium hydroxide or cesium hydroxide, a mixture of the two, or a mixture with another component. This type of storage cell is useful in spacecraft applications.
Abstract:
A microwave distributed amplifier (210) includes a plurality of cascaded field emission triodes (211, 212, 213), each having a field emission element (218) for emitting electrons, a grid (224) disposed downstream from the field emission element (218) along the electron flow path and an anode (243) disposed further downstream along the electron flow path. A series of inductive strips (228) interconnect successive grids (224) to form a grid transmission line (222), while another series of inductive strips (244) interconnect successive anodes (243) to form an anode transmission line (240). Small electron transit times over integrated circuit distances in a vacuum environment and low interelectrode capacitance allow extremely large gain-bandwidth products to be achieved.
Abstract:
A mask (18) for use in ion beam and x-ray lithography is prepared by depositing several layers of silicon-based materials onto a polished single-crystal silicon wafer (24), and then etching the layered structure to form the mask (18). A boron-doped, single crystal, epitaxial silicon layer (22) is first deposited overlying the silicon wafer (24), and the boron-doped layer (22) is partially oxidized on its exposed surface to form a thin silicon dioxide layer overlying the boron-doped layer (22). A layer of amorphous silicon is deposited overlying the silicon dioxide layer, an upper layer of silicon nitride is deposited overlying the amorphous silicon, and a lower layer of silicon nitride is deposited overlying the opposite side of the single-crystal silicon wafer (24). After patterning, a window is etched through the lower silicon nitride layer and into the single-crystal silicon wafer (24), to the boron-doped silicon layer (22). The exposure pattern is etched into the membrane through the upper silicon nitride layer, the layer of amorphous silicon, and the silicon dioxide layer, leaving thick unpatterned areas and thin patterned areas. During use of the mask, ions or x-rays pass through the patterned areas of the membrane, but are absorbed in the thicker unpatterned areas, to produce a pattern of transmitted ions or x-rays on the target.
Abstract:
A security system and method for IC circuits has at least one additional circuit element that does not contribute toward the IC's circuit function, but inhibits proper functioning of the IC in case of an attempted copying or other unauthorized use. The identity of the additional circuit elements is disguised by forming them with the visible appearance of an apparent element but with a physical modification which is not readily visible but causes them to function in a different manner, by providing different ICs with unique control codes, or both. Physical modifications not readily visible to a copyist include very narrow open circuit cuts in metallized connection lines, preferably with a focused ion beam (FIB) or laser beam; and/or disordering the lattice structure or changing the doping level of a semiconductor region, preferably with an FIB; and/or injecting electrical charge into a semiconductor region, preferably with an electron beam. The additional elements can be formed into a control code subcircuit for the IC, with the code disguised by the use of apparent elements. ICs can be grouped into an operational ring in which control codes are transmitted serially through the ring, and the invention can be applied to a combined hardware/software system. Individual copies of the software, preferably the operating system software, contain the unique control codes required by the modified ICs and the algorithms to interact with the system hardware for the purposes of transmitting, receiving, and authenticating the control codes.
Abstract:
According to the invention, a high-speed digital data communication system employs current mode circuitry as input and output devices at the ends of a transmission line, such as the interconnections between integrated circuit chips. Specifically, a current mode driver switch generates output current amplitudes responsive to a source of a digital signal representative of data to be transmitted. The switch output is connected to the input of a transmission line. The output of the transmission line is connected to the input of a receiving circuit that responds to the current amplitudes and has an input at an approximately constant voltage level. The receiving circuit is a transistor connected in a common base configuration. The emitter of the transistor is connected to the output of the transmission line. The base of the transistor is connected to a constant voltage source. A pulse shaper in the form of a Schmitt trigger has positive feedback from output to input. The described current mode circuitry is incorporated into an integrated circuit chip.
Abstract:
An LCLV is formed with a sapphire substrate (20) base, a highly doped, thin silicon epitaxial layer (2) forming an ohmic back contact on a smooth surface of the sapphire substrate, and a lightly doped, high resistivity silicon epitaxial layer (4) in the range of about 20-60 microns thick on the back contact. The use of a sapphire substrate provides a better surface quality and higher resolution than previously available with the semiconductor substrates. Lattice defects in the thin back contact are reduced by the formation of a buried amorphous layer adjacent the sapphire substrate, and subsequent recrystallization thereof using the unamorphized portions of the back contact as recrystallization seeds. The application of the invention to both MOS and Schottky diode LCLVs is discussed.
Abstract:
An analog-digital correlator (10) utilizes a plurality of sample and hold circuits (16-0 to 16-(M-1)) to directly store samples of a received analog signal. Bits of a correlation pattern are shifted through stages in a correlation pattern shift register (26). The state of the correlation pattern bits causes the value in the associated sample and hold circuit (16) to either be inverted or noninverted when it is summed with other similarly generated signals from the remaining sample and hold circuits to form the correlation output sum by network (30). The output of network (30) will peak when the bits of the digital correlation pattern signal are shifted to stages in register (26) that are aligned with the sample and hold circuits containing the digitally-impressed code of interest. In the preferred embodiment, a mask shift register (28) is used to selectively disable certain of the sample and hold circuits from affecting the correlation output sum. To this end, mask bits corresponding to the length of the digitally-impressed code are shifted through mask register (28) simultaneously with the correlation pattern bits in register (26).