中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

57 records (took 0.024 seconds)

    44.
    发明专利
    未知

    公开(公告)号：ITUB20155867A1

    公开(公告)日：2017-05-24

    申请号：ITUB20155867

    申请日：2015-11-24

    Applicant: ST MICROELECTRONICS SRL ,  ST MICROELECTRONICS ROUSSET

    Inventor： CONTE ANTONINO ,  LA ROSA FRANCESCO

    IPC: H03F3/45

    Abstract: A sense-amplifier circuit (10) of a non-volatile memory device (1), provided with: a biasing stage (11), which biases a bitline (BL) of a memory array (2) for pre-charging it during a pre-charging step of a reading operation of a datum stored in a memory cell (3); a current-to-voltage converter stage (12), with differential configuration and a first circuit branch (12a) and a second circuit branch (12b), which receive on a respective comparison input (IN a , IN b ), during a reading step of the datum subsequent to the pre-charging step, a cell current (I cell ) and a reference current (I ref ), each having a respective amplification module (22a, 22b), which generates a respective amplified voltage (V a , V b ), an output voltage (V out ) being a function of the difference between the amplified voltages (V a , V b ) and indicative of the value of the datum. A capacitive compensation module (26) detects and stores an offset between the first and second circuit branches during the pre-charging step, and compensates this offset in the output voltage (V out ) during the reading step of the datum.

Patent Agency Ranking