公开(公告)号：KR1020030000283A

公开(公告)日：2003-01-06

申请号：KR1020010035999

申请日：2001-06-23

Applicant: 삼성전자주식회사

Inventor： 장동훈 ,  방동수 ,  이중기

IPC: H01S5/06

CPC classification number: H01S5/026 ,  H01S5/02252 ,  H01S5/0264 ,  H01S5/0687 ,  H01S5/1085 ,  H01S5/125

Abstract: PURPOSE: A structure of a wavelength locking direct light source using an MMC(Multiple Micro-Cavity) is provided to measure a fine variation of wavelength by using the MMC. CONSTITUTION: A semiconductor laser(101) is used for generating light. The semiconductor laser(101) is formed on a semiconductor substrate(S). An etching portion(102) has an incline side(102a) for reflecting the second light of the semiconductor laser(101). An MMC portion(103) receives the first light of the semiconductor laser(101). The first light detector(104) is installed at an end portion of the MMC(103) in order to detect the first light of the semiconductor laser(101). The second light detector(105) is installed at an end portion of the etching portion(102) in order to detect the second light of the semiconductor laser(101).

Abstract translation: 目的：提供使用MMC（多微腔）的波长锁定直接光源的结构，通过使用MMC测量波长的微小变化。 构成：半导体激光器（101）用于产生光。 半导体激光器（101）形成在半导体衬底（S）上。 蚀刻部分（102）具有用于反射半导体激光器（101）的第二光的斜面（102a）。 MMC部分（103）接收半导体激光器（101）的第一光。 第一光检测器（104）安装在MMC（103）的端部，以便检测半导体激光器（101）的第一光。 为了检测半导体激光器（101）的第二光，第二光检测器（105）安装在蚀刻部分（102）的端部。

公开(公告)号：KR1020020049385A

公开(公告)日：2002-06-26

申请号：KR1020000078543

申请日：2000-12-19

Applicant: 삼성전자주식회사

Inventor： 장동훈

IPC: H01L27/15

CPC classification number: H01S5/18311 ,  H01S5/0425 ,  H01S5/18394 ,  H01S5/2081 ,  H01S2301/176

Abstract: PURPOSE: A semiconductor light-emitting device having an improved electro-optical characteristic is provided to automatically perform an alignment between central axes of the window of an upper electrode and a current aperture, by previously forming the upper electrode and by forming the current aperture through an oxide process after a post is formed by performing an etch process while the upper electrode is used as a mask. CONSTITUTION: The post composed of a plurality of layers including at least one preliminary oxide layer(17) is formed on a substrate. An electrode is formed on the post. The electrode is etched by a self-aligned method to form the post. The preliminary oxide layer is horizontally oxidized by a predetermined dimension from the sidewall of the etched post.

Abstract translation: 目的：提供具有改善的电光特性的半导体发光器件，以通过预先形成上电极并且通过形成电流孔径自动地执行上电极的窗口的中心轴与电流孔之间的对准 在使用上电极作为掩模的同时通过进行蚀刻工艺形成柱后的氧化物工艺。 构成：在基板上形成由包括至少一个预氧化物层（17）的多个层构成的柱。 在柱上形成电极。 通过自对准方法蚀刻电极以形成柱。 预氧化物层从蚀刻柱的侧壁被水平氧化预定的尺寸。

公开(公告)号：KR1020010084209A

公开(公告)日：2001-09-06

申请号：KR1020000009073

申请日：2000-02-24

Applicant: 삼성전자주식회사

Inventor： 황웅린 ,  김준영 ,  장동훈

IPC: H01L31/10

CPC classification number: H01L31/105

Abstract: PURPOSE: An optical detector device and a method for fabricating the same are to realize the low drive voltage and the high frequency reply characteristic without reducing a receiving-light area. CONSTITUTION: A lower semiconductor material layer(31) is deposited on a semiconductor substrate(30). The first intrinsic semiconductor material layer(41) is formed on the lower semiconductor material layer at the thickness of 6 micrometers. A main reflector layer(51) is formed on the first intrinsic semiconductor material layer. The second intrinsic semiconductor material layer(45) is formed on the main reflector layer at the thickness of 0.1 to 1 micrometers. An upper semiconductor material layer(35) is deposited on the second intrinsic semiconductor material layer. The main reflector layer is formed of a graded layer. An upper reflector layer(55) is formed on the upper semiconductor material layer. An upper electrode(37) is formed to electrically contact with the upper semiconductor material layer.

Abstract translation: 目的：一种光学检测器件及其制造方法是在不减少接收光面积的情况下实现低驱动电压和高频响应特性。 构成：半导体材料层（31）沉积在半导体衬底（30）上。 第一本征半导体材料层（41）以6微米的厚度形成在下半导体材料层上。 在第一本征半导体材料层上形成主反射层（51）。 第二本征半导体材料层（45）以0.1至1微米的厚度形成在主反射器层上。 上半导体材料层（35）沉积在第二本征半导体材料层上。 主反射层由渐变层形成。 在上半导体材料层上形成上反射层（55）。 上电极（37）形成为与上半导体材料层电接触。

公开(公告)号：KR102054226B1

公开(公告)日：2019-12-10

申请号：KR1020130027261

申请日：2013-03-14

Applicant: 삼성전자주식회사

Inventor： 이창현 ,  김현중 ,  장동훈 ,  파이루신알버트

IPC: H01L27/115 ,  H01L21/8247

公开(公告)号：KR101610829B1

公开(公告)日：2016-04-11

申请号：KR1020090124835

申请日：2009-12-15

Applicant: 삼성전자주식회사

Inventor： 박윤문 ,  박세준 ,  성석강 ,  장동훈

IPC: G11C16/00 ,  H01L27/115

CPC classification number: H01L21/823892 ,  G11C16/0483 ,  H01L27/0922 ,  H01L27/11526 ,  H01L27/11529

Abstract: 플래시메모리소자와그 웰구조가제안된다. 플래시메모리소자는, 다수의메모리셀들이하나의셀 스트링에직렬로연결되는낸드(NAND) 플래시메모리셀 영역; 워드라인을통하여상기메모리셀들과연결되는저전압및 고전압스위치가위치하는제1주변영역; 및상기저전압및 고전압스위치의벌크영역과연결되는벌크전압스위치가위치하는제2주변영역을포함하고, 상기제1주변영역은, 저전압스위치용엔모스타입트랜지스터(NMOS Tr)가위치되는제1 저전압엔모스영역(LV NMOS); 저전압스위치용피모스타입트랜지스터(PMOS Tr)가위치되는저전압피모스영역(LV PMOS); 고전압스위치용엔모스타입트랜지스터(NMOS Tr)가위치되는제1 고전압엔모스영역(HV NMOS); 및고전압스위치용피모스타입트랜지스터(PMOS Tr)가위치되는고전압피모스영역(HV PMOS)을포함하며, 상기제2주변영역은, 고전압의벌크전압스위치용엔모스타입트랜지스터(NMOS Tr)가위치되는제2 고전압엔모스영역(HV NMOS)을포함하고, 상기메모리셀들이위치하는상기셀 영역에상기메모리셀들을수용하는포켓 P-웰과, 상기포켓 P-웰을포위하는 N-웰이제공되고, 상기고전압의벌크전압스위치용엔모스타입트랜지스터(NMOS Tr)가위치되는상기제2 고전압엔모스영역(HV NMOS)에상기엔모스타입트랜지스터(NMOS Tr)을수용하는포켓 P-웰과상기포켓 P-웰을포위하는 N-웰이제공될수 있다.

公开(公告)号：KR1020120091578A

公开(公告)日：2012-08-20

申请号：KR1020110011425

申请日：2011-02-09

Applicant: 삼성전자주식회사

Inventor： 민병석 ,  박현희 ,  장동훈 ,  조성대

IPC: H04N9/77 ,  H04N1/46

CPC classification number: H04N1/6008 ,  H04N1/6027 ,  H04N1/6058

Abstract: PURPOSE: A method for changing brightness of an image and a device thereof are provided to control brightness without reducing a chroma in a TV, a mobile phone, or a project phone. CONSTITUTION: A brightness changing device changes a color space of an input image(401). The brightness changing device calculates a brightness control rate(403). The brightness changing device corrects the brightness control rate to maintain color balance(405). The brightness changing device multiplies the corrected brightness control rate with linear RGB(Red, Green, Blue). The brightness changing device controls brightness by calculating new RGB(407).

Abstract translation: 目的：提供一种改变图像亮度的方法及其装置，以控制亮度，而不会降低TV，移动电话或项目电话中的色度。 构成：亮度改变装置改变输入图像的颜色空间（401）。 亮度改变装置计算亮度控制率（403）。 亮度改变装置校正亮度控制率以保持色彩平衡（405）。 亮度改变装置将校正的亮度控制率与线性RGB（红色，绿色，蓝色）相乘。 亮度改变装置通过计算新的RGB来控制亮度（407）。

公开(公告)号：KR1020100007189A

公开(公告)日：2010-01-22

申请号：KR1020080067702

申请日：2008-07-11

Applicant: 삼성전자주식회사

Inventor： 이세훈 ,  이충호 ,  최정동 ,  김태용 ,  김우중 ,  장동훈 ,  윤영배 ,  김기현 ,  유민태

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L27/11573 ,  H01L21/823425 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11531 ,  H01L27/11568 ,  H01L29/78

Abstract: PURPOSE: A semiconductor device including driving transistors is provided to implement high integration by sharing one common source/drain among three driving transistors. CONSTITUTION: A driving active region is defined on a substrate(100). At least three driving transistors are formed on the driving active region. At least three driving transistors share one common source/drain(120s,120d). At least three driving transistors include at least three individual sources/drains respectively. The common source/drain and at least three sources/drains are formed on the driving active region.

Abstract translation: 目的：提供包括驱动晶体管的半导体器件，以通过在三个驱动晶体管之间共享一个公共源/漏来实现高集成度。 构成：在衬底（100）上限定驱动有源区。 至少三个驱动晶体管形成在驱动有源区上。 至少三个驱动晶体管共享一个共同的源极/漏极（120s，120d）。 至少三个驱动晶体管分别包括至少三个单独的源极/漏极。 公共源极/漏极和至少三个源极/漏极形成在驱动有源区域上。

公开(公告)号：KR1020100000329A

公开(公告)日：2010-01-06

申请号：KR1020080059781

申请日：2008-06-24

Applicant: 삼성전자주식회사

Inventor： 장동훈 ,  윤영배 ,  강희수 ,  나영섭 ,  최정동

IPC: H01L21/28

CPC classification number: H01L27/11521 ,  H01L27/115 ,  H01L27/11519

Abstract: PURPOSE: A semiconductor device with shared bit line scheme and method of manufacturing the same are provided to simplify the manufacturing process of the bit line contact. CONSTITUTION: The semiconductor device comprises the semiconductor substrate(100), and active area(110) and element isolation film(120). The semiconductor substrate has the active area and element isolation film. In the element isolation film is the semiconductor substrate, active areas are disunited electrically. The element isolation film has recess portion(120a) between active areas. The semiconductor device more includes the insulating layer(150), and active bridge pattern(170) and wiring line(190). It is located on surface the element isolation film and active areas and the insulating layer has openings. Openings partly expose the recess cattail and active areas. Wiring lines fill the openings of the insulating layer. Wiring lines electrically connect through active bridge patterns with active areas.

Abstract translation: 目的：提供具有共享位线方案的半导体器件及其制造方法，以简化位线接触的制造过程。 构成：半导体器件包括半导体衬底（100）和有源区（110）和元件隔离膜（120）。 半导体衬底具有有源区和元件隔离膜。 元件隔离膜是半导体衬底，有源区电气分离。 元件隔离膜在有源区域之间具有凹部（120a）。 半导体器件还包括绝缘层（150）和有源桥模式（170）和布线（190）。 它位于表面上的元件隔离膜和有源区，绝缘层具有开口。 开口部分暴露了凹陷和活动区域。 接线线填充绝缘层的开口。 接线通过主动桥型与有源区电连接。

公开(公告)号：KR1020090103386A

公开(公告)日：2009-10-01

申请号：KR1020080028956

申请日：2008-03-28

Applicant: 삼성전자주식회사

Inventor： 허두창 ,  심종인 ,  이중기 ,  장동훈

IPC: H01L33/36 ,  H01L33/38

Abstract: PURPOSE: A semiconductor light source is provided to minimize the effect of static electricity and generation of heat caused by current crowding. CONSTITUTION: A semi-conductor light source(100) includes the substrate(110), the semiconductor layer(120), the first electrode(161), the active layer(130), the second semiconductor layer(140), the transparent electrode(150), and the second electrode(162). The semiconductor layer is grown on a substrate. The first electrode is formed on the semiconductor layer. The active layer is formed on the semiconductor layer to expose the first electrode. The second semiconductor layers are grown on the active layer. The transparent electrode is formed on the second semiconductor layers. The second electrode is formed on the transparent electrode. The transparent electrode has the high resistance area.

Abstract translation: 目的：提供半导体光源，以最小化静电产生的影响和由当前拥挤造成的热量。 构成：半导体光源（100）包括基板（110），半导体层（120），第一电极（161），有源层（130），第二半导体层（140），透明电极 （150）和第二电极（162）。 在衬底上生长半导体层。 第一电极形成在半导体层上。 有源层形成在半导体层上以露出第一电极。 在活性层上生长第二半导体层。 透明电极形成在第二半导体层上。 第二电极形成在透明电极上。 透明电极具有高电阻面积。

公开(公告)号：KR1020090097737A

公开(公告)日：2009-09-16

申请号：KR1020080023062

申请日：2008-03-12

Applicant: 삼성전자주식회사

Inventor： 윤영배 ,  최정동 ,  장동훈 ,  김기현

IPC: H01L21/76

CPC classification number: H01L21/823481 ,  H01L21/823456 ,  H01L27/11521 ,  H01L27/11524

Abstract: A non-volatile memory device having a built-in type shielding plate and a manufacturing method thereof are provided to increase storage capacity of a memory device per unit area by excluding an isolation film of a wide dimension. A plurality of memory cells and a high voltage transistor are formed on an active region of a semiconductor substrate(100). Isolation films(120) are formed between the semiconductor memory cell and the high voltage transistor. A built-in type shielding plate structure(162) is formed between base parts of the isolation films. The memory cell is a flash memory string cell. A wing spacer(170) is formed on a sidewall of a flash memory cell gate. The wing spacer is formed on a top part of a surface of the semiconductor substrate.

Abstract translation: 提供具有内置型屏蔽板的非易失性存储器件及其制造方法，通过排除宽尺寸的隔离膜来增加每单位面积的存储器件的存储容量。 在半导体衬底（100）的有源区上形成多个存储单元和高电压晶体管。 隔离膜（120）形成在半导体存储单元和高电压晶体管之间。 在隔离膜的基部之间形成内置型屏蔽板结构（162）。 存储单元是闪存串单元。 翼片间隔件（170）形成在闪速存储器单元门的侧壁上。 翼间隔件形成在半导体衬底的表面的顶部上。