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公开(公告)号:KR1019920002663B1
公开(公告)日:1992-03-31
申请号:KR1019890019312
申请日:1989-12-22
Applicant: 한국전자통신연구원
IPC: G06F13/14
Abstract: The apparatus includes a data transmission bus requestor (2) for carrying out data transmissions and for informing it to a processor (1). A responder (2) transfers the task to a memory (4), and informs the result to the data transmission bus requestor (2). An address region encoder (12) forms an address region in accordance with the output of the processor (1), and a parity generator (13) generates parity signals for data transmissions. A slot address translator (14) generates address tags, and a tag receiver (20) receives the address tags through the system bus (3). A comparator (21) compares the address tags with the data tags. The apparatus maximizes the utilization of the system bus.
Abstract translation: 该装置包括用于执行数据传输并将其通知给处理器(1)的数据传输总线请求器(2)。 响应者(2)将任务传送到存储器(4),并将结果通知给数据传输总线请求者(2)。 地址区域编码器(12)根据处理器(1)的输出形成地址区域,并且奇偶生成器(13)产生用于数据传输的奇偶校验信号。 插槽地址转换器(14)产生地址标签,标签接收器(20)通过系统总线(3)接收地址标签。 比较器(21)将地址标签与数据标签进行比较。 该装置使系统总线的利用最大化。
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