公开(公告)号：KR100423392B1

公开(公告)日：2004-03-18

申请号：KR1020020019166

申请日：2002-04-09

Applicant: 한국전자통신연구원

Inventor： 김유진 ,  강성수 ,  정해원 ,  이형호

IPC: H04L12/28

Abstract: PURPOSE: A wireless LAN(Local Area Network) AP(Access Point) connection device is provided to efficiently operate a system by performing a MAC(Media Access Control) function. CONSTITUTION: A wireless module interface unit(408) provides an interface with a wireless LAN AP function unit(421) which performs a MAC with respect to a plurality of media. A control processor(410) connects to the wireless module interface unit(408), and controls and manages a main processor(423) which supports a wired speed in a system. The control processor(410) performs the MAC function of the wireless LAN AP function unit(421). The wireless module interface unit(408) connects to the control processor(410) through a PCI(Peripheral Component Interconnect) bus(409).

Abstract translation: 目的：提供无线LAN（局域网）AP（接入点）连接设备，通过执行MAC（媒体访问控制）功能有效地操作系统。 组成：无线模块接口单元（408）提供与无线LAN AP功能单元（421）的接口，该单元对多个媒体执行MAC。 控制处理器（410）连接到无线模块接口单元（408），并控制和管理支持系统中的有线速度的主处理器（423）。 控制处理器（410）执行无线LAN AP功能单元（421）的MAC功能。 无线模块接口单元（408）通过PCI（外围组件互连）总线（409）连接到控制处理器（410）。

公开(公告)号：KR1020040020084A

公开(公告)日：2004-03-09

申请号：KR1020020051387

申请日：2002-08-29

Applicant: 한국전자통신연구원

Inventor： 조승현 ,  정의석 ,  김병휘 ,  이형호

IPC: G02B6/293

CPC classification number: G02B6/2932 ,  G02B6/02057 ,  G02B6/29383

Abstract: PURPOSE: An apparatus for inserting and extracting an optical signal is provided to make its structure simple in comparison with an optical circulation apparatus by utilizing an optical divide coupling device and an optical fiber Bragg grating in place with an optical circulation apparatus and a Bragg grating. CONSTITUTION: An apparatus(400) for inserting and extracting an optical signal includes an optical inputting and extracting block, an optical transmitting and reflecting block and an optical signal insertion/extracting block. The optical inputting and extracting block inputs an optical signal of wavelength divisional multiplex multi-wavelength and outputs the optical signal by dividing the optical signal corresponding to the set coupling ratio among the inputted multi-wavelength optical signals. The optical inputting and extracting block extracts the optical signal of a specific wavelength reflected from the outputted optical signals. The optical transmitting and reflecting block reflects the optical signal of the specific wavelength among the multi-wavelengths of the optical signals outputted from the optical inputting and extracting block. The optical transmitting and reflecting block transmits the optical signal of the remaining wavelengths. And, the optical signal insertion/extracting block outputs the optical signal by dividing the optical signal corresponding to the set coupling ratio among the inputted optical signals of multi-wavelengths and inserts the optical signal having a specific wavelength.

Abstract translation: 目的：提供一种用于插入和提取光信号的装置，其结构与光学循环装置相比，通过光学循环装置和布拉格光栅利用光分离耦合装置和光纤布拉格光栅，使其结构简单。 构成：用于插入和提取光信号的装置（400）包括光输入和提取块，光发射和反射块以及光信号插入/提取块。 光输入和提取块输入波分复用多波长的光信号，并通过对输入的多波长光信号中与设置的耦合比相对应的光信号进行分频来输出光信号。 光输入和提取块提取从输出的光信号反射的特定波长的光信号。 光发送和反射块反射从光输入和提取块输出的光信号的多波长中的特定波长的光信号。 光发射和反射块传输剩余波长的光信号。 并且，光信号插入/提取块通过将输入的多波长光信号中的设定耦合比对应的光信号除以输入光信号，并插入具有特定波长的光信号。

公开(公告)号：KR1020030094913A

公开(公告)日：2003-12-18

申请号：KR1020020032260

申请日：2002-06-10

Applicant: 한국전자통신연구원

Inventor： 정의석 ,  김병휘 ,  이형호

IPC: H04L12/40

CPC classification number: H04L41/0677

Abstract: PURPOSE: A serial bus type form recognizing and alarming device supporting a hierarchical structure is provided to increase recognition form kinds and failed state collections as supporting the hierarchical structure, and to duplex form recognition by exactly perceiving a data path failure, thereby improving reliability. CONSTITUTION: The first transmitters(201) report self board IDs and board failed state information through the first serial buses(211). The second transmitters(210) collect the transmitted board IDs and the failed state information, report the collected information through the second serial bus(212), and transmit self IDs. A recognizer(220) collects the transmitted board IDs and the failed state information, confirms forms and states of each PBA(Printed circuit Board Assembly)(200), and reports the collected information to a terminal(230). When the recognizer(220) calls the board IDs and the failed state information, the second transmitters(210) connect the first serial buses(211) with the second serial bus(212), and the first transmitters(201) transmit the information to the recognizer(220).

Abstract translation: 目的：提供支持分层结构的串行总线型形式识别和报警装置，以增加识别形式种类和故障状态集合，支持层次结构，并通过精确地感知数据路径故障来双重形式识别，从而提高可靠性。 规定：第一台发射机（201）通过第一个串行总线（211）报告自身板ID和板故障状态信息。 第二发送器（210）收集所发送的板ID和故障状态信息，通过第二串行总线（212）报告所收集的信息，并发送自身ID。 识别器（220）收集所发送的板ID和故障状态信息，确认每个PBA（印刷电路板组件）（200）的形式和状态，并将收集的信息报告给终端（230）。 当识别器（220）调用板ID和故障状态信息时，第二发射机（210）将第一串行总线（211）与第二串行总线（212）连接，并且第一发射机（201）将信息发送到 识别器（220）。

公开(公告)号：KR1020030094464A

公开(公告)日：2003-12-12

申请号：KR1020020031365

申请日：2002-06-04

Applicant: 한국전자통신연구원

Inventor： 김법중 ,  최우영 ,  전종암 ,  변성혁 ,  김학서 ,  장원석 ,  김재영 ,  안병준 ,  이형호

IPC: H04L12/02

CPC classification number: H04L45/60 ,  G06F13/4004 ,  H04L49/351

Abstract: PURPOSE: A line interface module in a router and a routing system having the same are provided to integrate many line interfaces into a single line interface module and to execute fault management, inter-processor connection, switch interfacing, etc., through the line interface module. CONSTITUTION: A line interface module(10) consists of a sub switching card(13) and a backplane(14). The sub switching card(13) comprises line cards(11,12), a sub switch(131), and switch input-output buffers(133,134). The backplane(14) connects between the line cards(11,12) and the sub switching card(13). Each line card(11,12) comprises physical link ports(111,114,121,124), physical layer interface parts(112,15,122,125), and network processors(113,116,123,126). The network processors(113,116,123,126) process the packet switching and forwarding function of an OSI(Open System Interconnection) 3/4+ layer. The sub switch(131) executes sub switching to target data channels for the data supplied from the line cards(11,12) and the switch input-output buffers(133,134). The switch input-output buffers(133,134) buffer the data inputted/outputted between the switch of a routing system and the sub switch(131).

Abstract translation: 目的：提供路由器中的线路接口模块和具有该线路接口模块的路由系统，以将许多线路接口集成到单线接口模块中，并通过线路接口执行故障管理，处理器间连接，交换机接口等 模块。 构成：线路接口模块（10）由子交换卡（13）和背板（14）组成。 副开关卡（13）包括线路卡（11,12），子开关（131）和开关输入输出缓冲器（133,134）。 背板（14）连接在线路卡（11,12）和子交换卡（13）之间。 每个线卡（11,12）包括物理链路端口（111,114,121,124），物理层接口部分（112,15,122,125）和网络处理器（113,116,123,126）。 网络处理器（113,116,123,126）处理OSI（开放系统互连）3/4 +层的分组交换和转发功能。 子开关（131）对从线卡（11,12）和开关输入 - 输出缓冲器（133,134）提供的数据执行对目标数据通道的子切换。 开关输入输出缓冲器（133,134）缓冲在路由系统的交换机和子交换机（131）之间输入/输出的数据。

公开(公告)号：KR1020030093741A

公开(公告)日：2003-12-11

申请号：KR1020020031584

申请日：2002-06-05

Applicant: 한국전자통신연구원

Inventor： 이왕봉 ,  방영철 ,  정영식 ,  이형호

IPC: H04L12/28

CPC classification number: H04L45/60 ,  H04L45/04 ,  H04L47/24 ,  H04L49/3009

Abstract: PURPOSE: A high speed router system is provided to distribute a portion of an IP(Internet Protocol) packet and a portion of an Internet control message in a line processor, thereby reducing processing load of a non-forwarding packet concentrated on a main processor. CONSTITUTION: Line processor nodes(101) comprise as follows. External physical link connection blocks(1011) are physically connected to external networks. Network processor blocks(1012) perform routing lookup processes after interpreting destination addresses of packets, and forward the routing lookup processes. Microprocessor blocks(1013) communicate with a main processor node(102) with configuration information of the line processor nodes(101). The main processor node(102) consists of a microprocessor block(1021) for communicating with the line processor nodes(101) and processing a routing protocol collecting routing information.

Abstract translation: 目的：提供一种高速路由器系统，用于在线路处理器中分配一部分IP（互联网协议）数据包和一部分互联网控制消息，从而减少集中在主处理器上的非转发数据包的处理负担。 构成：线路处理器节点（101）包括如下。 外部物理链路连接块（1011）物理连接到外部网络。 网络处理器块（1012）在解释分组的目的地址之后执行路由查找过程，并转发路由查找过程。 微处理器块（1013）与具有行处理器节点（101）的配置信息的主处理器节点（102）通信。 主处理器节点（102）由用于与线路处理器节点（101）进行通信并处理收集路由信息的路由协议的微处理器块（1021）组成。

公开(公告)号：KR1020030091236A

公开(公告)日：2003-12-03

申请号：KR1020020029114

申请日：2002-05-25

Applicant: 한국전자통신연구원

Inventor： 조경섭 ,  김태일 ,  이형호

IPC: H04L12/28

Abstract: PURPOSE: A method for adding or deleting line card and line interface information on on-line in a distributed processing high-speed router is provided to mount a line card on on-line without stopping the service of a system, install a corresponding line interface, and remove the corresponding line interface for dismounting the line card. CONSTITUTION: If an operator inputs a line card addition command in a standby state and a terminal of the operator receives the line card addition command(S403), the terminal checks whether line card information requested by the operator previously exists in a database(S404). If a line card does not exist, the terminal adds line card addition information requested by the operator in the database(S405). The terminal outputs that the addition of the line card is normal for informing the operator that the line card addition command is normally performed(S406). If the operator confirms that the addition of the line card is normal, the operator mounts the line card on a system(S407). The operator loads a program necessary for operation and confirms whether the line card is normally operated(S408).

Abstract translation: 目的：提供一种在分布式处理高速路由器中在线添加或删除线路卡和线路接口信息的方法，用于在线停止线路卡而不停止系统服务，安装相应的线路接口 ，并删除相应的线路接口以卸下线路卡。 规定：如果操作员在待机状态下输入线卡添加命令，并且操作员的终端接收到线路卡添加命令（S403），则终端检查操作者请求的线路卡信息是否先前存在于数据库中（S404） 。 如果线路卡不存在，则终端将数据库中由操作者请求的线路卡附加信息添加到（S405）。 终端输出线路卡的添加是正常的，以通知操作者正常执行线路卡相加命令（S406）。 如果操作者确认线路卡的添加正常，操作员将线路卡安装在系统上（S407）。 操作员加载操作所需的程序，并确认线卡是否正常工作（S408）。

公开(公告)号：KR1020030079454A

公开(公告)日：2003-10-10

申请号：KR1020020018497

申请日：2002-04-04

Applicant: 한국전자통신연구원

Inventor： 나용욱 ,  강성수 ,  정해원 ,  이형호

IPC: H04L12/851 ,  H04L12/937

CPC classification number: H04L47/2441 ,  H04L49/101 ,  H04L49/30

Abstract: PURPOSE: An input control device and method in a packet switch system is provided to increase the usability of a network system and improve the performance of a high-speed packet switch system, without the necessity of increasing internal operation speed, by fairly switching packets according to the priority order. CONSTITUTION: An input control device and method in a packet switch system is composed of the first demultiplexer(4200), the first and second control parts(4210,4220), the first and second multiplexers(4270a,4270b), a port selection control part(4280), and the third multiplexer(4290). The first demultiplexer(4200) divides inputted packets into unicast packets and multicast or broadcast packets and outputs the divided packets to the first and second control parts(4210,4220). The first control part(4210) consists of the second demultiplexer(4231a) and the first and second storage parts(4240a,4240b). The second demultiplexer(4231a) separates the unicast packets inputted from the first demultiplexer(4200) into real-time traffics and non-real time traffics. The first and second storage parts(4240a,4240b) classify the real-time and non-real time traffics outputted from the second demultiplexer(4231a) by output ports and outputs them selectively. The second control part(4220) is composed of a selector(4232), the third demultiplexer(4231b), the third and fourth storage parts(4250a,4250b), and the fifth and sixth storage parts(4260a,4260b). The first multiplexer(4270a), connected to the first storage part(4240a) and the fifth storage part(4260a), selects the real-time traffics outputted from the first storage part(4240a) and the fifth storage part(4260a). The second multiplexer(4270b), connected to the second storage part(4240b) and the sixth storage part(4260b), selects the non-real time traffics outputted from the second storage part(4240b) and the sixth storage part(4260b). The third multiplexer(4290) selects one between the real-time packet outputted from the first multiplexer(4270a) and the non-real time packet outputted from the second multiplexer(4270b) and transfers it to a switch fabric. The port selection control part(4280) executes communication for the port arbitration of a crossbar scheduler in the switch fabric.

Abstract translation: 目的：提供分组交换系统中的输入控制装置和方法，以提高网络系统的可用性，提高高速分组交换系统的性能，而不必增加内部运行速度 到优先顺序。 构成：分组交换系统中的输入控制装置和方法由第一解复用器（4200），第一和第二控制部分（4210,4220），第一和第二多路复用器（4270a，4270b），端口选择控制 部分（4280）和第三多路复用器（4290）。 第一解复用器（4200）将输入的分组划分为单播分组和多播或广播分组，并将分割的分组输出到第一和第二控制部分（4210,4220）。 第一控制部分（4210）由第二解复用器（4231a）和第一和第二存储部分（4240a，4240b）组成。 第二解复用器（4231a）将从第一解复用器（4200）输入的单播分组分离成实时业务和非实时业务。 第一和第二存储部分（4240a，4240b）通过输出端口将从第二解复用器（4231a）输出的实时和非实时流量分类并选择性地输出。 第二控制部分（4220）由选择器（4232），第三解复用器（4231b），第三和第四存储部件（4250a，4250b）和第五和第六存储部件（4260a，4260b）组成。 连接到第一存储部分（4240a）和第五存储部分（4260a）的第一多路复用器（4270a）选择从第一存储部分（4240a）和第五存储部分（4260a）输出的实时流量。 连接到第二存储部分（4240b）和第六存储部分（4260b）的第二多路复用器（4270b）选择从第二存储部分（4240b）和第六存储部分（4260b）输出的非实时业务。 第三多路复用器（4290）从第一多路复用器（4270a）输出的实时分组和从第二多路复用器（4270b）输出的非实时分组之间选择一个，并将其传送到交换结构。 端口选择控制部分（4280）执行用于交换结构中的跨栏调度器的端口仲裁的通信。

公开(公告)号：KR1020030079279A

公开(公告)日：2003-10-10

申请号：KR1020020018220

申请日：2002-04-03

Applicant: 한국전자통신연구원

Inventor： 박봉혁 ,  정해원 ,  이형호

IPC: H04L27/32

Abstract: PURPOSE: A double modulation and demodulation high frequency wave transmitting and receiving device for commonly implementing RF is provided to allow a plurality of signals of different modulation and demodulation methods to be transmitted by the same RF. CONSTITUTION: A double modulation and demodulation high frequency wave transmitting and receiving device(100) for commonly implementing RF includes Gaussian frequency shift keying and quadrature phase shift keying base band signal control block(10), a radio frequency down stream conversion block(20), an RF local signal generation block(30), an RF upstream conversion block, a panel selection filter block(50), an intermediate filter down stream conversion block(60), an intermediate frequency local signal generation block(70), an intermediate frequency upstream conversion block(80), a bandpass filter(11), a switch(12), a plurality of switch drivers(13,14,15,16,17), a reception signal intensity detector(18) and a peak detector(19). In the double modulation and demodulation high frequency wave transmitting and receiving device(100), the digital signal inputted from the base band is converted into analog signal at the digital to analog converters. The high frequency components of in-phase and quadrature-phase signals outputted from the digital to analog converters are removed at the low pass filters and inputted to the I/Q modulators.

Abstract translation: 目的：提供用于通常实现RF的双调制和解调高频波发射和接收设备，以允许不同调制和解调方法的多个信号由相同的RF发射。 一种用于通常实现RF的双调制和解调高频波发射和接收装置（100）包括高斯频移键控和正交相移键控基带信号控制块（10），射频下行流转换块（20） ，RF本地信号生成块（30），RF上游转换块，面板选择滤波器块（50），中间滤波器下行转换块（60），中频本地信号生成块（70），中间 频率上游转换块（80），带通滤波器（11），开关（12），多个开关驱动器（13,14,15,16,17），接收信号强度检测器（18）和峰值检测器 （19）。 在双调制和解调高频波发射和接收装置（100）中，从基带输入的数字信号在数模转换器转换为模拟信号。 在低通滤波器处，从数模转换器输出的同相和正交相位信号的高频分量被去除并输入到I / Q调制器。

公开(公告)号：KR100396843B1

公开(公告)日：2003-09-02

申请号：KR1020000070425

申请日：2000-11-24

Applicant: 한국전자통신연구원

Inventor： 김법중 ,  나지하 ,  안병준 ,  김재영 ,  김학서 ,  이형호

IPC: H04L12/50

Abstract: PURPOSE: An apparatus and a method for exchanging an IPC(Inter Processor Communication) message using an ethernet switching device are provided to install the ethernet switching device in a module matching backplane of an ATM(Asynchronous Transfer Mode) switch, construct an IPC message dedicated star ethernet network, and transmit and receive the IPC message using an ethernet switching method. CONSTITUTION: An ethernet switching device(112) switches a path of an IPC ethernet frame transmitted from a transmission side processor and transmits the IPC ethernet frame to a receipt side processor. Each processor connects to a star ethernet network centering around the ethernet switching device(112). The ethernet switching device(112) is embedded in a main processor module(110).

Abstract translation: 目的：提供一种使用以太网交换设备交换IPC（处理器间通信）消息的设备和方法，以将以太网交换设备安装在与ATM（异步传输模式）交换机的背板匹配的模块中，构建IPC消息专用 使用以太网交换方法发送和接收IPC消息。 构成：以太网交换设备（112）切换从传输侧处理器发送的IPC以太网帧的路径，并将IPC以太网帧发送到接收侧处理器。 每个处理器连接到围绕以太网交换设备（112）的星形以太网网络。 以太网交换设备（112）嵌入在主处理器模块（110）中。

公开(公告)号：KR1020030055467A

公开(公告)日：2003-07-04

申请号：KR1020010085017

申请日：2001-12-26

Applicant: 한국전자통신연구원

Inventor： 김봉완 ,  윤빈영 ,  이형섭 ,  이형호

IPC: G06F12/00

CPC classification number: G06F12/023

Abstract: PURPOSE: A method for allocating a memory using multi-step division is provided to allocate sub blocks separated to each block as one storing region by assigning each sub block on the same position in the block to a same pointer value. CONSTITUTION: The memory is divided into a plurality of blocks by analyzing the value of a fixed allocation request size used as a basic unit of the allocation. Each block is uniformly divided into the sub blocks of the same number. Each sub block placed on the same order in the blocks is assigned by one pointer value. The sub blocks in each block, which is assigned by one pointer value, are allocated as one storing region.

Abstract translation: 目的：提供一种使用多级除法分配存储器的方法，通过将块中相同位置上的每个子块分配给相同的指针值，来将分配给每个块的子块分配为一个存储区。 构成：通过分析用作分配的基本单位的固定分配请求大小的值，将存储器分成多个块。 每个块被均匀地划分成相同数量的子块。 在块中以相同顺序放置的每个子块由一个指针值分配。 由一个指针值分配的每个块中的子块被分配为一个存储区域。