公开(公告)号：SG11202104106WA

公开(公告)日：2021-05-28

申请号：SG11202104106W

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE ,  KLEIN MATTHIAS ,  SLEGEL TIMOTHY ,  FARRELL MARK ,  SOFIA ANTHONY ,  WEISHAUPT SIMON ,  MISHRA ASHUTOSH

IPC: G06F9/30

Abstract: A DEFLATE Conversion Call general-purpose processor instruction. An instruction is obtained by a general-purpose processor of the computing environment. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes transforming, based on a function to be performed by the instruction being a compression function or a decompression function, state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data. The transformed state of the data is provided as output to be used in performing a task.

公开(公告)号：AU2019377216A1

公开(公告)日：2021-04-22

申请号：AU2019377216

申请日：2019-11-05

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  RECKTENWALD MARTIN ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY ,  PURANIK ADITYA NITIN ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  BRADBURY JONATHAN ,  ZOELLIN CHRISTIAN GERHARD

IPC: G06F9/30

Abstract: A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.

公开(公告)号：AU2018209079B2

公开(公告)日：2020-10-15

申请号：AU2018209079

申请日：2018-01-12

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  SHUM CHUNG-LUNG

IPC: G06F12/02 ,  G06F9/30 ,  G06F9/46 ,  G06F11/07 ,  G06F11/36 ,  G06F12/0855 ,  G06F12/14

Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.

公开(公告)号：AU2018209084B2

公开(公告)日：2020-10-08

申请号：AU2018209084

申请日：2018-01-12

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  SHUM CHUNG-LUNG ,  OSISEK DAMIAN

IPC: G06F12/02 ,  G06F9/455

Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.

公开(公告)号：CA3127864A1

公开(公告)日：2020-08-06

申请号：CA3127864

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  SOFIA ANTHONY THOMAS ,  KLEIN MATTHIAS ,  WEISHAUPT SIMON ,  FARRELL MARK ,  SLEGEL TIMOTHY ,  MISHRA ASHUTOSH ,  JACOBI CHRISTIAN

IPC: G06F9/30

Abstract: An instruction to perform a function of a plurality of functions is obtained. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes performing the function specified by the instruction. The performing includes, based on the function being a compression function or a decompression function, transforming state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data accessing. During performing the function, history relating to the function is accessed. The history is to be used in transforming the state of input data between the uncompressed form and the compressed form.

公开(公告)号：CA3118174A1

公开(公告)日：2020-05-14

申请号：CA3118174

申请日：2019-11-05

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  RECKTENWALD MARTIN ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY ,  PURANIK ADITYA NITIN ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  BRADBURY JONATHAN ,  ZOELLIN CHRISTIAN GERHARD

IPC: G06F9/30 ,  G06F9/38

Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.

公开(公告)号：CA2874181C

公开(公告)日：2020-03-24

申请号：CA2874181

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN

IPC: G06F9/30 ,  G06F12/00

Abstract: Constrained transactional processing is provided. A constrained transaction is initiated by execution of a Transaction Begin constrained instruction. The constrained transaction has a number of restrictions associated therewith. Absent violation of a restriction, the constrained transaction is to complete. If an abort condition is encountered, the transaction is re-executed starting at the Transaction Begin instruction. Violation of a restriction may cause an interrupt.

公开(公告)号：CA2874179C

公开(公告)日：2020-02-18

申请号：CA2874179

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY

IPC: G06F9/30 ,  G06F9/312

Abstract: A transaction begin instruction begins execution of a transaction and includes a general register save mask having bits, that when set, indicate registers to be saved in the event the transaction is aborted. At the beginning of the transaction, contents of the registers are saved in memory not accessible to the program, and if the transaction is aborted, the saved contents are copied to the registers.

公开(公告)号：CA2874178C

公开(公告)日：2020-02-18

申请号：CA2874178

申请日：2012-11-26

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F9/30 ,  G06F9/48

Abstract: Program exception conditions cause a transaction to abort and typically result in an interruption in which the operating system obtains control. A program interruption filtering control is provided to selectively present the interrupt. That is, the interrupt from the program exception condition may or may not be presented depending at least on the program interruption filtering control and a transaction class associated with the program exception condition. The program interruption filtering control is provided by a TRANSACTION BEGIN instruction.

公开(公告)号：CA2867116C

公开(公告)日：2020-02-18

申请号：CA2867116

申请日：2012-11-15

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN

IPC: G06F9/34

Abstract: A Load Count to Block Boundary instruction is provided that provides a distance from a specified memory address to a specified memory boundary. The memory boundary is a boundary that is not to be crossed in loading data. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary; or it may be dynamically determined.