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    使用包含未填滿以留下一間隙與脈動打印之打印機於基材上之軟材料的改良壓印技術
    61.
    发明专利
    使用包含未填滿以留下一間隙與脈動打印之打印機於基材上之軟材料的改良壓印技術 审中-公开
    使用包含未填满以留下一间隙与脉动打印之打印机于基材上之软材料的改良压印技术

    公开(公告)号：TW201321167A

    公开(公告)日：2013-06-01

    申请号：TW101134893

    申请日：2012-09-24

    Applicant: 1366科技公司 ,  1366 TECHNOLOGIES INC.

    Inventor： 莎栩思 伊繆爾M ,  SACHS, EMANUEL M.

    IPC: B29C59/02 ,  B29C35/02

    CPC classification number: H01L31/18 ,  B29C33/40 ,  B29C33/42 ,  B29C33/424 ,  B29C43/021 ,  B29C2033/426 ,  B29C2043/025 ,  B29C2059/023 ,  B81C99/0085 ,  B81C2201/0153 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002

    Abstract: 用於將圖案賦予至基材上之可流動的抗蝕劑材料之方法需要提供一如此薄之抗蝕劑層，以致在打印機楔入製程期間，於楔子突出部份之間該抗蝕劑絕不會完全填充該基材及打印機的底部表面之間的空間，而在其間到處留下一間隙。一間隙保留於該抗蝕劑及該打印機的延伸表面之間。當被沈積時，如果該抗蝕劑層係稍微比該目標數量更厚，其將剛好於抗蝕劑及工具之間造成一較小的間隙。連續間隙之存在確保沒有壓力累積在該打印機之下。如此，該等突出部份上之力量係僅只藉由該打印機上方之壓力所決定，且被很好地控制，導致孔洞尺寸受很好的控制。該間隙防止抗蝕劑被完全汲取出任何一區域，且如此防止任何區域未覆蓋抗蝕劑。該打印機可在其與該基材之接觸中脈動，反覆地變形該等壓凹之突出部份。數個脈動比單一下壓較佳地清除任何浮渣層，如藉由測量用於正常持續時間之正常蝕刻將蝕刻掉基材材料之程度的蝕刻測試比較所得到之結果。

    Abstract in simplified Chinese: 用于将图案赋予至基材上之可流动的抗蚀剂材料之方法需要提供一如此薄之抗蚀剂层，以致在打印机楔入制程期间，于楔子突出部份之间该抗蚀剂绝不会完全填充该基材及打印机的底部表面之间的空间，而在其间到处留下一间隙。一间隙保留于该抗蚀剂及该打印机的延伸表面之间。当被沉积时，如果该抗蚀剂层系稍微比该目标数量更厚，其将刚好于抗蚀剂及工具之间造成一较小的间隙。连续间隙之存在确保没有压力累积在该打印机之下。如此，该等突出部份上之力量系仅只借由该打印机上方之压力所决定，且被很好地控制，导致孔洞尺寸受很好的控制。该间隙防止抗蚀剂被完全汲取出任何一区域，且如此防止任何区域未覆盖抗蚀剂。该打印机可在其与该基材之接触中脉动，反复地变形该等压凹之突出部份。数个脉动比单一下压较佳地清除任何浮渣层，如借由测量用于正常持续时间之正常蚀刻将蚀刻掉基材材料之程度的蚀刻测试比较所得到之结果。

    METHODS AND APPARATI FOR MAKING THIN SEMI-CONDUCTOR WAFERS WITH LOCALLY CONTROLLED REGIONS THAT ARE RELATIVELY THICKER THAN OTHER REGIONS AND SUCH WAFERS
    62.
    发明公开
    METHODS AND APPARATI FOR MAKING THIN SEMI-CONDUCTOR WAFERS WITH LOCALLY CONTROLLED REGIONS THAT ARE RELATIVELY THICKER THAN OTHER REGIONS AND SUCH WAFERS 审中-公开
    方法和设备薄半导体晶圆本地生产控制，相对较厚的地区以及其他领域，WAFER

    公开(公告)号：EP3138130A1

    公开(公告)日：2017-03-08

    申请号：EP15785573.5

    申请日：2015-04-17

    Applicant: 1366 Technologies Inc.

    Inventor： SACHS, Emanuel M. ,  JONCZYK, Ralf ,  LORENZ, Adam L. ,  WALLACE, Richard L. ,  HUDELSON, G. D. Stephen

    IPC: H01L31/0236

    CPC classification number: C30B11/02 ,  C30B29/06 ,  H01L29/0657 ,  H01L31/022441 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/0682 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    Abstract: Semi-conductor wafers with thin and thicker regions at controlled locations may be for Photovoltaics. The interior may be less than 180 microns or thinner, to 50 microns, with a thicker portion, at 180 - 250 microns. Thin wafers have higher efficiency. A thicker perimeter provides handling strength. Thicker stripes, landings and islands are for metallization coupling. Wafers may be made directly from a melt upon a template with regions of different heat extraction propensity arranged to correspond to locations of relative thicknesses. Interstitial oxygen is less than 6 x 10
    17 atoms/cc, preferably less than 2 x 10
    17 , total oxygen less than 8. 75 x 10
    17 atoms/cc, preferably less than 5. 25 x 10
    17 . Thicker regions form adjacent template regions having relatively higher heat extraction propensity; thinner regions adjacent regions with lesser extraction propensity. Thicker template regions have higher extraction propensity. Functional materials upon the template also have differing extraction propensities.

    Abstract translation: 与在受控的位置和薄较厚的区域半导体晶片可以是用于光伏。 内部可小于180微米或更薄，至50微米，具有较厚的部分，在180-250微米。 薄晶片具有更高的效率。 较厚的周边提供了操作强度。 较厚的条纹，着陆和岛屿是用于金属化耦合。 晶片可以由熔体直接在与布置为对应于相对厚度的位置处的不同的热提取倾向的区域的模板来制备。 填隙氧小于6×10 17原子/ cc，优选小于2×1017，总氧小于8.75×1017原子/ cc，优选小于5.25×第一千〇十七 较厚的区域形成具有相对较高的热提取倾向模板相邻区域; 较薄的区域相邻的区域具有较小的倾向萃取。 较厚的模板区域有较高的倾向提取。 在模板功能材料alsohave不同的提取倾向。

    METHODS TO PATTERN DIFFUSION LAYERS IN SOLAR CELLS AND SOLAR CELLS MADE BY SUCH METHODS
    63.
    发明公开
    METHODS TO PATTERN DIFFUSION LAYERS IN SOLAR CELLS AND SOLAR CELLS MADE BY SUCH METHODS 审中-公开
    方法用于太阳能电池结构的扩散层，从而制造的太阳能电池

    公开(公告)号：EP2279526A1

    公开(公告)日：2011-02-02

    申请号：EP09755220.2

    申请日：2009-04-17

    Applicant: 1366 Technologies Inc.

    Inventor： GABOR, Andrew, M ,  WALLACE, Richard, L.

    IPC: H01L31/00

    CPC classification number: H01L31/1804 ,  H01L21/228 ,  H01L21/6715 ,  H01L31/022425 ,  H01L31/0288 ,  Y02E10/547 ,  Y02P70/521

    Abstract: Methods exploiting a Self Aligned Cell (SAC) architecture for doping purposes, use the architecture to direct the deposition and application of either a dopant or a diffusion retarder. Doping is provided in regions that will become metallization for conducting fingers. Dopant may be treated directly into metallization grooves. Or, diffusion retarder may be provided in non-groove locations, and dopant may be provided over some or all of the entire wafer surface. Dopant and metal automatically go where desired, and in register with each other. The SAC architecture also includes concave surfaces for light absorbing regions of a cell, to reduce reflection of light energy, which regions may also be treated with dopant in the concavities, to result in semiconductor emitter lines. Alternatively, diffusion retarder may be treated into the concavities, leaving upper tips of ridges between the concavities exposed, thereby subject to deeper doping.

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