公开(公告)号：KR101718077B1

公开(公告)日：2017-03-21

申请号：KR1020100072098

申请日：2010-07-26

Applicant: 삼성전자주식회사

Inventor： 황인준 ,  신재광 ,  오재준 ,  김종섭 ,  최혁순 ,  홍기하

IPC: H01L29/778 ,  H01L21/335

Abstract: 고전자이동도트랜지스터및 그제조방법에관해개시되어있다. 일실시예에의한개시된 HEMT는소스전극, 게이트전극및 드레인전극을포함하고, 상기소스전극과상기드레인전극사이에수직으로적층된복수의채널을포함하는적층물이존재하고, 상기복수의채널은이격되어있고, 상기복수의채널각각은 2DEG 채널을포함할수 있다. 소스전극은오믹접촉되고, 드레인전극은쇼트키접촉된다.

Abstract translation: 公开了高电子迁移率晶体管及其制造方法。 HEMT公开根据一个实施例包括源电极，栅电极和漏电极，包括多个信道的竖直堆叠的源极电极和漏极电极之间的层叠体是存在的，并且所述多个信道的 并且多个频道中的每一个可以包括2DEG频道。 源电极被欧姆接触，并且漏电极被做成肖特基接触。

公开(公告)号：KR1020160150085A

公开(公告)日：2016-12-28

申请号：KR1020160173794

申请日：2016-12-19

Applicant: 삼성전자주식회사

Inventor： 황인준 ,  김종섭 ,  신재광 ,  오재준 ,  최혁순 ,  홍기하

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/778 ,  H01L29/10 ,  H01L29/20

CPC classification number: H01L29/66462 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/78621

Abstract: LDD를갖는고 전자이동도트랜지스터(HEMT) 및그 제조방법에관해개시되어있다. 개시된 HEMT는소스전극, 게이트전극및 드레인전극을포함하고, 적어도 2DEG 채널을형성시키는채널공급층, 상기채널공급층에의해적어도 2DEG 채널이형성되는채널형성층을포함하며, 상기채널공급층은분극률이서로다른복수의반도체층을포함하고, 상기채널공급층의일부영역은리세스(recess)되어있고, 상기복수의반도체층에서최상층아래의반도체중 하나는채널공급층이면서식각버퍼층이다.

公开(公告)号：KR1020140042472A

公开(公告)日：2014-04-07

申请号：KR1020120109274

申请日：2012-09-28

Applicant: 삼성전자주식회사

Inventor： 전우철 ,  이백우 ,  신재광 ,  오재준

IPC: H01L27/00 ,  H01L21/768

CPC classification number: H01L29/205 ,  H01L21/2654 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0629 ,  H01L28/10 ,  H01L28/20 ,  H01L29/0642 ,  H01L29/2003 ,  H01L29/7786 ,  H01L29/86 ,  H01L29/94

Abstract: A nitride semiconductor based power converting device is disclosed. The disclosed nitride semiconductor based power converting device includes a nitride semiconductor based power transistor and at least one passive element of a nitride semiconductor. The passive element and the power transistor include each channel layer which includes a first nitride semiconductor formed in the same vertical position, and a channel supply layer which includes a second nitride semiconductor on the channel layer and induces a two-dimensional electron gas in the channel layer. The passive element may be a resistor, an inductor, or a capacitor.

Abstract translation: 公开了一种基于氮化物半导体的电力转换装置。 所公开的基于氮化物半导体的功率转换器件包括氮化物半导体功率晶体管和氮化物半导体的至少一个无源元件。 无源元件和功率晶体管包括每个沟道层，其包括形成在相同垂直位置的第一氮化物半导体，以及沟道供应层，其在沟道层上包括第二氮化物半导体，并在沟道中诱导二维电子气 层。 无源元件可以是电阻器，电感器或电容器。

公开(公告)号：KR1020140042470A

公开(公告)日：2014-04-07

申请号：KR1020120109267

申请日：2012-09-28

Applicant: 삼성전자주식회사

Inventor： 전우철 ,  박영환 ,  오재준 ,  김경연 ,  김준용 ,  박기열 ,  신재광 ,  황선규

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/778 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/7786

Abstract: A normally off high electron mobility transistor is disclosed. The disclosed normally off high electron mobility transistor includes a channel layer which includes a first nitride semiconductor, a channel supply layer which includes a second nitride semiconductor and induces a 2D electron gas on the channel layer, a source electrode and a drain electrode in both sides of the channel supply layer, a depletion formation layer which forms a depletion region in the 2D electron gas on the channel supply layer and has at least two thicknesses, a gate insulating layer on the depletion formation layer, and a gate electrode which touches the depletion formation layer on the gate insulating layer.

Abstract translation: 公开了常闭高电子迁移率晶体管。 所公开的常关高电子迁移率晶体管包括沟道层，其包括第一氮化物半导体，包括第二氮化物半导体的沟道供应层，并且在沟道层上引入2D电子气体，在两侧引入源电极和漏电极 的沟道供应层，耗尽层形成层，其在沟道供应层上的2D电子气中形成耗尽区，并且具有至少两个厚度，在耗尽层上的栅极绝缘层，以及接触耗尽层的耗尽层 栅极绝缘层上的形成层。

公开(公告)号：KR1020140011585A

公开(公告)日：2014-01-29

申请号：KR1020120077923

申请日：2012-07-17

Applicant: 삼성전자주식회사

Inventor： 전우철 ,  박기열 ,  박영환 ,  신재광 ,  오재준 ,  최혁순 ,  하종봉

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/778 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41758 ,  H01L29/41766 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7786

Abstract: A high electron mobility transistor (HEMT) and a manufacturing method thereof are disclosed. The disclosed HEMT includes: a channel layer; a channel supply layer which is formed on the channel layer; a source electrode and a drain electrode which are formed on the channel layer or the channel supply layer; a gate electrode which is arranged between the source electrode and the drain electrode; and a source pad and a drain pad which electrically comes in contact with each of the source electrode and the drain electrode. At least one between the source pad and the drain pad is able to have a structure in which at least one part is inserted inside an electrode which electrically comes in contact with at least one of the source pad and the drain pad.

Abstract translation: 公开了一种高电子迁移率晶体管（HEMT）及其制造方法。 所公开的HEMT包括：信道层; 形成在沟道层上的沟道供给层; 形成在沟道层或沟道供给层上的源电极和漏极; 设置在源电极和漏电极之间的栅电极; 以及源极焊盘和漏极焊盘，其与源极电极和漏极电极中的每一个电接触。 源极焊盘和漏极焊盘之间的至少一个能够具有这样的结构，其中至少一个部分被插入到与源极焊盘和漏极焊盘中的至少一个电接触的电极内部。

公开(公告)号：KR1020130043047A

公开(公告)日：2013-04-29

申请号：KR1020120059433

申请日：2012-06-01

Applicant: 삼성전자주식회사

Inventor： 황인준 ,  오재준 ,  이재원 ,  최효지

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/7783 ,  H01L29/2003 ,  H01L29/66462

Abstract: PURPOSE: A high electron mobility transistor and a manufacturing method thereof are provided to minimize the change of a gate threshold voltage by accurately controlling the thickness of a material layer. CONSTITUTION: A channel layer(34) includes a 2DEG channel and a depletion region. A first channel supply layer(36) is formed on the channel layer. A depletion layer(40) is formed in a part of the first channel supply layer and the depletion region. The depletion region is formed between a source electrode and a drain electrode to face each other. A gate(44) is formed on the depletion layer.

Abstract translation: 目的：提供高电子迁移率晶体管及其制造方法，以通过精确地控制材料层的厚度来最小化栅极阈值电压的变化。 构成：通道层（34）包括2DEG通道和耗尽区域。 第一沟道供应层（36）形成在沟道层上。 耗尽层（40）形成在第一沟道供应层和耗尽区的一部分中。 耗尽区形成在源电极和漏电极之间以彼此面对。 在耗尽层上形成栅极（44）。

公开(公告)号：KR1020130007051A

公开(公告)日：2013-01-18

申请号：KR1020110063047

申请日：2011-06-28

Applicant: 삼성전자주식회사

Inventor： 황인준 ,  홍기하 ,  오재준 ,  하종봉 ,  김종섭 ,  최혁순 ,  신재광

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/0657 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/3065 ,  H01L29/0653 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7782 ,  H01L29/7787

Abstract: PURPOSE: A high electron mobility transistor and a manufacturing method thereof are provided to improve a breakdown voltage by forming a cavity in a substrate area on the lower side of a semiconductor layer. CONSTITUTION: A first semiconductor layer(20) is formed on a substrate. A second semiconductor layer(30) is formed on the first semiconductor layer. A source, drain, and a gate are formed on the second semiconductor layer. A cavity is formed on the substrate and is located under the drain.

Abstract translation: 目的：提供高电子迁移率晶体管及其制造方法，以通过在半导体层的下侧的衬底区域中形成空穴来提高击穿电压。 构成：在基板上形成第一半导体层（20）。 在第一半导体层上形成第二半导体层（30）。 源极，漏极和栅极形成在第二半导体层上。 在基板上形成空腔，位于排水管下方。

公开(公告)号：KR1020120037315A

公开(公告)日：2012-04-19

申请号：KR1020100098995

申请日：2010-10-11

Applicant: 삼성전자주식회사

Inventor： 황인준 ,  김종섭 ,  최혁순 ,  홍기하 ,  신재광 ,  오재준

IPC: H01L29/778

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/66462

Abstract: PURPOSE: An E-mode high electron mobility transistor and a manufacturing method thereof are provided to activate a high electron mobility transistor to an E-mode by including a barrier layer having polarization density gradient in the lower side of a gate electrode. CONSTITUTION: A seed layer(32) is formed on a substrate(30). A buffer layer(34) is formed on the seed layer. A channel layer(36) including 2DEG(Dimensional Electron Gas) is formed on the buffer layer. The thickness of the channel layer is 5 to 1000nm. A barrier layer(38) is formed on the channel layer. The barrier layer composed of a first barrier layer, a second barrier layer, and a third barrier layer. A gate electrode(44), source and drain electrodes(46, 48) are formed on the barrier layer. Gate laminating materials are located between the source electrode and the drain electrode.

Abstract translation: 目的：提供E型高电子迁移率晶体管及其制造方法，通过在栅电极的下侧包括具有偏振密度梯度的势垒层，将高电子迁移率晶体管激活为E模式。 构成：在基板（30）上形成种子层（32）。 在种子层上形成缓冲层（34）。 在缓冲层上形成包含2DEG（尺寸电子气体）的沟道层（36）。 沟道层的厚度为5〜1000nm。 阻挡层（38）形成在沟道层上。 阻挡层由第一阻挡层，第二阻挡层和第三阻挡层构成。 栅电极（44），源电极和漏电极（46,48）形成在阻挡层上。 栅层叠材料位于源电极和漏电极之间。

公开(公告)号：KR1020110122527A

公开(公告)日：2011-11-10

申请号：KR1020100042085

申请日：2010-05-04

Applicant: 삼성전자주식회사

Inventor： 김호정 ,  신재광 ,  오재준 ,  김종섭 ,  최혁순 ,  황인준 ,  홍기하

IPC: H03K17/16 ,  H03K17/284 ,  G01R31/02

CPC classification number: H03K17/163 ,  H03K17/284 ,  G01R31/02 ,  H03K2217/0063 ,  H03K2217/0081

Abstract: PURPOSE: A power device is provided to prevent a current from being leaked between a control terminal and an output terminal by limiting a voltage between the output terminal and the control terminal to be less than a critical voltage and controlling the target level of a driving voltage based on the current voltage property of a switching element. CONSTITUTION: The power device(1) comprises a switching element(10), a driving part(20), and a power supply part(30). The switching element has a control terminal and an output terminal. The driving part offers a driving voltage to the control terminal, limits a voltage between the output terminal and the control terminal to be less than a critical voltage, and determines a rising time for the target level of a driving voltage according to the voltage and the current characteristic of the switching element. A leaked current is generated between the control terminal and the output terminal if a voltage between the output terminal and the control terminal is bigger than the critical voltage.

Abstract translation: 目的：通过将输出端子和控制端子之间的电压限制在小于临界电压并控制驱动电压的目标电平，来提供功率器件以防止电流在控制端子和输出端子之间泄漏 基于开关元件的电流电压特性。 构成：功率器件（1）包括开关元件（10），驱动部件（20）和电源部件（30）。 开关元件具有控制端子和输出端子。 驱动部件向控制端子提供驱动电压，将输出端子和控制端子之间的电压限制为小于临界电压，并根据电压和电压确定驱动电压的目标电平的上升时间 开关元件的电流特性。 如果输出端子和控制端子之间的电压大于临界电压，则在控制端子和输出端子之间产生泄漏电流。

公开(公告)号：KR1020110027994A

公开(公告)日：2011-03-17

申请号：KR1020090085874

申请日：2009-09-11

Applicant: 삼성전자주식회사

Inventor： 홍기하 ,  김종섭 ,  오재준 ,  신재광 ,  최혁순 ,  황인준 ,  김호정

IPC: H01L21/336 ,  H01L29/78

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/7787 ,  H01L29/41725

Abstract: PURPOSE: A field effect semiconductor device and a manufacturing method thereof are provided to configure a gate electrode in a double gate electrode structure, thereby increasing a breakdown voltage. CONSTITUTION: The second semiconductor layer(11) is formed on the first side of the first semiconductor layer(10). The third semiconductor layers(12) are formed on both sides of the semiconductor layer. A source(13) and a drain(14) are formed on the third semiconductor layer. The third semiconductor layers are respectively formed on both sides of second semiconductor layer. A gate electrode(15) is formed on the second side of the first semiconductor layer. The gate electrode is formed in a double gate structure.

Abstract translation: 目的：提供场效应半导体器件及其制造方法以在双栅极电极结构中构成栅电极，从而提高击穿电压。 构成：第二半导体层（11）形成在第一半导体层（10）的第一侧上。 第三半导体层（12）形成在半导体层的两侧。 源极（13）和漏极（14）形成在第三半导体层上。 第三半导体层分别形成在第二半导体层的两侧。 栅电极（15）形成在第一半导体层的第二侧上。 栅电极形成为双栅极结构。