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公开(公告)号：KR101030016B1
公开(公告)日：2011-04-20
申请号：KR1020080127269
申请日：2008-12-15
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
Abstract: 본 발명의 비휘발성 프로그래머블 스위치 소자는 반도체 기판 상에 형성된 제1 전극과, 제1 전극 상에서 제1 전극의 일부를 노출하는 포어를 갖는 절연층과 및 포어 측면에 형성된 발열 전극을 포함한다. 제1 전극과 연결되고 포어 내에 형성되면서 발열 전극과 접촉하는 상변화층이 형성되어 있다. 상변화층과 연결된 제2 전극과, 발열 전극의 일측부와 연결된 제3 전극과, 발열 전극의 타측부와 연결된 제4 전극이 형성되어 있다.
Abstract translation: 本发明的非易失性可编程开关元件包括形成在半导体衬底上的第一电极，具有暴露第一电极上的第一电极的一部分的孔的绝缘层以及形成在孔侧上的加热电极。 形成连接到第一电极并形成在孔中并与加热电极接触的相变层。 连接到放热电极的一侧的第三电极和连接到放热电极的另一侧的第四电极。
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公开(公告)号：KR1020100126179A
公开(公告)日：2010-12-01
申请号：KR1020100016905
申请日：2010-02-25
Applicant: 한국전자통신연구원
Abstract: PURPOSE: A thermal component and a manufacturing method thereof using the radiant heat as the heat source are provided to implement the thermal component of high efficiency by maximizing the heat absorption efficiency of a heat absorption layer and the heat radiation efficiency of a heat radiation layer. CONSTITUTION: A heat absorption layer(220) absorbing the radiant heat is formed on the top of a substrate(210). A leg(230) transfers the heat absorbed through a heat absorbing layer to a heat radiation layer(240). The heat radiation layer emits the heat which it is transmitted from the leg to outside.
Abstract translation: 目的：提供使用辐射热作为热源的热成分及其制造方法，通过使吸热层的吸热效率和散热层的散热效率最大化，实现高效率的热分量。 构成：吸收辐射热的吸热层（220）形成在衬底（210）的顶部上。 腿（230）将通过吸热层吸收的热量传递到散热层（240）。 散热层发射从腿部向外部传递的热量。
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公开(公告)号：KR100968888B1
公开(公告)日：2010-07-09
申请号：KR1020080096529
申请日：2008-10-01
Applicant: 한국전자통신연구원
IPC: H01L27/115
CPC classification number: H01L45/1226 , H01L45/06 , H01L45/1206 , H01L45/144 , H01L45/1625 , H01L45/1675
Abstract: 본 발명의 상변화 메모리 소자를 이용한 비휘발성 프로그래머블 스위치 소자는 기판, 상기 기판 상에 형성되고, 복수의 단자를 구비하는 제 1 금속 전극층, 상기 기판의 상부에서 상기 제 1 금속 전극층의 단자를 연결하는 형태로 형성되고, 자기 발열형 채널 구조로 구성되는 상변화 재료층, 상기 제 1 금속 전극층 및 상기 상변화 재료층 상부에 형성된 절연층, 상기 제 1 금속 전극층의 상부에 형성된 비아 홀, 그리고 상기 비아 홀을 매립하는 형태로 형성된 제 2 금속 전극층을 포함한다. 따라서, 별도의 발열 전극을 사용하지 않고 상변화 물질 자체의 저항에 따른 발열 현상을 이용하여 메모리 동작을 수행함으로써, 금속 전극의 열전도에 따른 열손실을 최소화하여 스위치 소자의 소비전력을 감소시킬 수 있다.
프로그래머블, 스위치, 상변화, 비휘발성 메모리, 재구성형 LSI-
公开(公告)号：KR1020100070034A
公开(公告)日：2010-06-25
申请号：KR1020080128624
申请日：2008-12-17
Applicant: 한국전자통신연구원
CPC classification number: H03K19/17784 , H03K19/17728 , H03K19/17792
Abstract: PURPOSE: A programmable logic block of an FPGA using a phase-change memory device is provided to improve the performance of an operation by programming resistance of a phase change memory device individually. CONSTITUTION: An access transistor(Mu) for pull-up is connected to a power. An up phase change memory device(Ru) is connected to a transistor for pull-up. The phase change memory device(Rd) is connected to an up-phase change memory device. An output terminal is located between the up-phase change memory device and a down-phase change memory device. The access transistor(Md) for the full down is connected to the down-phase change memory device. The resistance of the up-phase change memory device and the down-phase change memory device is individually programmed.
Abstract translation: 目的：提供使用相变存储器件的FPGA的可编程逻辑块，以通过单独编程相变存储器件的电阻来提高操作的性能。 构成：用于上拉的存取晶体管（Mu）连接到电源。 上升相变存储器件（Ru）连接到用于上拉的晶体管。 相变存储器件（Rd）连接到上变相存储器件。 输出端子位于上变相存储器件和下变相存储器件之间。 用于全降温的存取晶体管（Md）连接到下变相存储器件。 单相编程上变相存储器件和下变相存储器件的电阻。
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公开(公告)号：KR1020100063613A
公开(公告)日：2010-06-11
申请号：KR1020090026876
申请日：2009-03-30
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: PURPOSE: A nonvolatility programmable switch device using a phase change memory device and a manufacturing method thereof are provided to reduce a miniaturization of a device and a consumption power by providing 4 terminal type device structure with easily dividing a write and a reading. CONSTITUTION: A semiconductor film layer(140) is formed on a first metal electrode layer(120). An insulator film layer is formed on the semiconductor film layer. The insulator thin film layer includes a pore region(220) exposing a part of the semiconductor film layer. A reaction material layer(240) fills in the pore region of the insulator film layer. A second metal electrode layer(260) is formed on upper part of the reaction material layer. A phase change operational layer(280) is formed by a solid-state reaction with reacting the reaction material layer and the semiconductor film layer.
Abstract translation: 目的：提供一种使用相变存储器件的非易失性可编程开关器件及其制造方法，其通过提供容易划分写入和读取的4端子型器件结构来减小器件的小型化和消耗功率。 构成：半导体膜层（140）形成在第一金属电极层（120）上。 在半导体膜层上形成绝缘膜层。 绝缘体薄膜层包括暴露半导体膜层的一部分的孔区域（220）。 反应材料层（240）填充绝缘膜层的细孔区域。 第二金属电极层（260）形成在反应材料层的上部。 通过使反应材料层和半导体膜层反应而通过固相反应形成相变操作层（280）。
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Patent Agency Ranking
公开(公告)号：KR1020090081302A
公开(公告)日：2009-07-28
申请号：KR1020080022402
申请日：2008-03-11
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1683
Abstract: A phase change memory device and a manufacturing method thereof for increasing operation stability and reliability are provided to increase the phase change memory device and distribution character of the set state resistance value. A phase change memory device comprises a phase change material layer(22). The phase change material layer is comprised of the germanium-antimony-tellurium system. The composition of the antimony added to the Ge2Sb2+xTe5 comprising the phase change material layer to the excess of quantity is 0.12~0.32. As to the Ge2Sb2+xTe5 comprising the phase change material layer, the structure of the crystalline state is comprised of the hcp single phase.
Abstract translation: 提供一种用于增加操作稳定性和可靠性的相变存储器件及其制造方法，以增加相变存储器件和设定状态电阻值的分布特性。 相变存储器件包括相变材料层（22）。 相变材料层由锗 - 锑 - 碲系统组成。 添加到包含相变材料层的Ge2Sb2 + xTe5中的锑的组成超过量为0.12〜0.32。 对于包含相变材料层的Ge2Sb2 + xTe5，结晶态的结构由hcp单相组成。
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公开(公告)号：KR1020090063059A
公开(公告)日：2009-06-17
申请号：KR1020080047400
申请日：2008-05-22
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01H36/00 , B82Y10/00
CPC classification number: H01L45/1608 , B82Y10/00 , H01L45/141 , H01L45/1666
Abstract: A programmable switch device and a method for manufacturing the same are provided to reduce a size of a switch device by forming the switch device of a simple structure comprised of two electrodes and a nano wire. A substrate(100) has a silicon oxide film by thermally oxidizing the surface of a silicon substrate or the silicon semiconductor substrate. A first electrode layer(110) is formed on the substrate. The first electrode layer is comprised of two first patterns(111) with a square shape and a second pattern(112) with a line shape connected to the first pattern. The first electrode layer is divided into two parts of both sides of a groove formed on the surface of the substrate. A second electrode layer(120) serving as the terminal of the switch device is formed in the upper part of the first electrode layer. A chalcogenide nano wire(130) is formed between the cross sections of the second pattern of the first electrode layer.
Abstract translation: 提供了可编程开关装置及其制造方法，通过形成由两个电极和纳米线组成的简单结构的开关装置来减小开关装置的尺寸。 通过热氧化硅衬底或硅半导体衬底的表面，衬底（100）具有氧化硅膜。 在基板上形成第一电极层（110）。 第一电极层由具有正方形的两个第一图案（111）和与第一图案连接的线形的第二图案（112）组成。 第一电极层被分成在基板的表面上形成的凹槽的两侧的两部分。 用作开关装置的端子的第二电极层（120）形成在第一电极层的上部。 在第一电极层的第二图案的横截面之间形成硫族化物纳米线（130）。
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公开(公告)号：KR100895797B1
公开(公告)日：2009-05-08
申请号：KR1020070127796
申请日：2007-12-10
Applicant: 한국전자통신연구원
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: 본 발명은 발열층을 포함하는 상변화 소자의 제조 방법에 관한 것으로, 발열층의 형성 온도를 상온에서 500℃ 사이의 온도로 한정함으로써 반도체 공정에서 널리 사용되는 Al 등의 금속을 그 하부에 위치하는 하부전극 물질로 사용할 수 있도록 한다.
본 발명의 상변화 소자는, 하부 전극층; 상기 하부 전극층 상면에 형성되며 전도도를 높이는 도펀트를 함유하는 SiGe 재질의 발열층; 상기 발열층 상면에 형성된 상변화 특성을 가지는 상변화 영역; 및 상기 상변화층 상면에 형성된 상부 전극을 포함하는 것을 특징으로 한다.
상변화, 메모리, 비휘발성, 발열층, 실리콘-게르마늄, 스퍼터링-
公开(公告)号：KR1020080052083A
公开(公告)日：2008-06-11
申请号：KR1020060124118
申请日：2006-12-07
Applicant: 한국전자통신연구원
IPC: H01L27/115
CPC classification number: H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1666 , G11C13/0004
Abstract: A phase shift memory device is provided to reduce the power consumption of the entire phase shift memory by reducing reset current. A transistor includes a gate electrode on a semiconductor substrate(100) and first and second impurity regions formed in the semiconductor substrate at both sides of the gate electrode. A bitline is electrically connected to the first impurity region. A phase shift resistance device(150) is electrically connected to the second impurity region. The phase shift resistance device includes a lower electrode(152) made of a doped SiGe layer, a phase shift layer(154) in contact with the lower electrode, and an upper electrode(156) connected to the phase shift layer. A conductive base layer can be formed between the semiconductor substrate and the lower electrode.
Abstract translation: 提供一种相移存储器件，通过减少复位电流来降低整个相移存储器的功耗。 晶体管包括在半导体衬底（100）上的栅电极和形成在栅电极两侧的半导体衬底中的第一和第二杂质区。 位线与第一杂质区电连接。 相移阻抗器件（150）电连接到第二杂质区域。 相移电阻装置包括由掺杂的SiGe层制成的下电极（152），与下电极接触的相移层（154）和连接到相移层的上电极（156）。 可以在半导体衬底和下电极之间形成导电基层。
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公开(公告)号：KR1020080051777A
公开(公告)日：2008-06-11
申请号：KR1020060123401
申请日：2006-12-06
Applicant: 한국전자통신연구원
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144
Abstract: A phase change memory device and a manufacturing method thereof are provided to reduce a contact area between a heat radiating electrode and a phase change layer pattern by contacting a side of the heat radiating electrode with the phase change layer pattern. A lower electrode(110) is formed on a semiconductor substrate(100), and a first insulating pattern(122) is formed on the lower electrode. A heat radiating electrode(132) is extended from the first insulating pattern to the lower electrode, on which one side is laid on the first insulating pattern. A second insulating pattern(124) is formed on the heat radiating electrode in the same pattern as the heat radiating pattern. A phase change layer pattern(134) is extended from the second insulating pattern to the first insulating pattern, of which a portion contacts one side of the heat radiating electrode on the first insulating pattern. A contact(142) is electrically connected to the phase change layer pattern, and an upper electrode(144) is electrically connected to the phase change layer pattern.
Abstract translation: 提供了一种相变存储器件及其制造方法，其通过使热辐射电极的一侧与相变层图案接触来减小散热电极与相变层图案之间的接触面积。 在半导体衬底（100）上形成下电极（110），在下电极上形成第一绝缘图案（122）。 散热电极（132）从第一绝缘图案延伸到下电极，一侧被放置在第一绝缘图案上。 第二绝缘图案（124）以与散热图案相同的图案形成在散热电极上。 相变层图案（134）从第二绝缘图案延伸到第一绝缘图案，其中一部分接触第一绝缘图案上的散热电极的一侧。 触点（142）电连接到相变层图案，并且上电极（144）电连接到相变层图案。
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