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公开(公告)号:GB2393851A
公开(公告)日:2004-04-07
申请号:GB0316906
申请日:2002-01-03
Applicant: HRL LAB LLC
Inventor: CHOW LAP-WAI , BAUKAS JAMES P , CLARK JR WILLIAM M
IPC: H01L23/52 , H01L21/3205 , H01L21/822 , H01L21/8238 , H01L23/58 , H01L27/02 , H01L27/04 , H01L27/10 , H01L29/76
Abstract: Semiconducting devices, including integrated circuits, protected from reverse engineering comprising metal traces leading to field oxide. Metallization usually leads to the gate, source or drain areas of the circuit, but not to the insulating field oxide, thus misleading a reverse engineer. A method for fabricating such devices.
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公开(公告)号:AU2002316261A1
公开(公告)日:2003-01-02
申请号:AU2002316261
申请日:2002-06-13
Applicant: HRL LAB LLC
Inventor: CHOW LAP-WAI , CLARK WILLIAM M JR , BAUKUS JAMES P
IPC: H01L21/768 , H01L27/02 , H01L21/8234 , H01L23/58 , H01L27/088
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63.
公开(公告)号:AU2002309501A1
公开(公告)日:2002-11-18
申请号:AU2002309501
申请日:2002-03-12
Applicant: HRL LAB LLC
Inventor: CHOW LAP-WAI , CLARK JR WILLIAM M , BAUKAS JAMES P
IPC: G11C17/18 , G06F12/14 , G11C7/12 , G11C7/18 , G11C7/24 , G11C16/02 , G11C16/22 , H01L21/8246 , H01L21/8247 , H01L27/02 , H01L27/10 , H01L27/112 , H01L27/115 , H01L23/58 , G11C11/4078
Abstract: A method and circuit for blocking unauthorized access to at least one memory cell in a semiconductor memory. The method includes providing a switch and/or a link which assumes an open state when access to the at least one memory cell is to be blocked; and coupling-a data line associated with the at least one memory cell to a constant voltage source in response to the switch or link assuming an open state.
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公开(公告)号:AU2002234203A1
公开(公告)日:2002-08-06
申请号:AU2002234203
申请日:2002-01-03
Applicant: HRL LAB LLC
Inventor: BAUKAS JAMES P , CLARK WILLIAM M JR , CHOW LAP-WAI
IPC: H01L23/52 , H01L21/3205 , H01L21/822 , H01L21/8238 , H01L23/58 , H01L27/02 , H01L27/04 , H01L27/10 , H01L29/76
Abstract: Semiconducting devices, including integrated circuits, protected from reverse engineering comprising metal traces leading to field oxide. Metallization usually leads to the gate, source or drain areas of the circuit, but not to the insulating field oxide, thus misleading a reverse engineer. A method for fabricating such devices.
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公开(公告)号:AU2002234201A1
公开(公告)日:2002-08-06
申请号:AU2002234201
申请日:2002-01-03
Applicant: HRL LAB LLC
Inventor: BAUKAS JAMES P , CHOW LAP-WAI , CLARK WILLIAM M JR
IPC: H01L23/522 , H01L23/58 , H01L27/02
Abstract: A device adapted to protect integrated circuits from reverse engineering comprising a part looking like a via connecting two metal layers, but in fact attached only to one metal layer and spaced from the other. Having such "trick" via would force a reverse engineer to think there is a connection where there is none. A method for fabricating such device.
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