公开(公告)号：AU2015238665A1

公开(公告)日：2016-08-04

申请号：AU2015238665

申请日：2015-03-16

Applicant: IBM

Inventor： GREINER DAN ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  SCHMIDT DONALD WILLIAM ,  BUSABA FADI YUSUF ,  KUBALA JEFFREY PAUL ,  BRADBURY JONATHAN DAVID ,  HELLER LISA CRANTON ,  SLEGEL TIMOTHY ,  GAINEY JR CHARLES

IPC: G06F9/50 ,  G06F9/38

Abstract: A computer system includes a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. A multithreading facility is configured to control utilization of the configuration to perform a method that includes accessing the primary thread in the ST mode using a core address value and switching from the ST mode to the MT mode. The primary thread or one of the one or more secondary threads is accessed in the MT mode using an expanded address value, where the expanded address value includes the core address value concatenated with a thread address value.

公开(公告)号：AU2015238662A1

公开(公告)日：2016-08-04

申请号：AU2015238662

申请日：2015-03-16

Applicant: IBM

Inventor： HELLER LISA CRANTON ,  BRADBURY JONATHAN DAVID ,  KUBALA JEFFREY PAUL ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  GREINER DAN ,  SLEGEL TIMOTHY ,  BUSABA FADI YUSUF ,  SCHMIDT DONALD WILLIAM ,  GAINY JR CHARLES

IPC: G06F9/455 ,  G06F9/50

Abstract: A computer system includes a virtual machine (VM) configuration with one or more cores. Each core is enabled to operate in a single thread (ST) mode or a multithreading (MT) mode. The ST mode consists of a single thread and the MT mode consists of a plurality of threads on shared resources of a respective core. The computer system includes a core-oriented system control area (COSCA) having a common area representing all of the cores of the VM configuration and separate core description areas for each of the cores in the VM configuration. Each core description area indicates a location of one or more thread description areas each representing a thread within the respective core, and each thread description area indicates a location of a state description of the respective thread.

公开(公告)号：AU2010355815B2

公开(公告)日：2014-10-30

申请号：AU2010355815

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  OSISEK DAMIAN LEO ,  SLEGEL TIMOTHY

IPC: G06F9/455 ,  G06F9/30 ,  G06F9/318

Abstract: Selected installed function of a multi-function instruction is hidden such that even though a processor is capable of performing the hidden installed function, the availability of the hidden function is hidden such that responsive to the multi- function instruction querying the availability of functions, only functions not hidden are reported as installed.

公开(公告)号：HRP20131009T1

公开(公告)日：2013-12-06

申请号：HRP20131009

申请日：2013-10-23

Applicant: IBM

Inventor： GREINER DAN ,  OSISEK DAMIAN LEO ,  SLEGEL TIMOTHY ,  HELLER LISA

IPC: G06F9/455 ,  G06F9/30

公开(公告)号：ZA201209645B

公开(公告)日：2013-08-28

申请号：ZA201209645

申请日：2012-12-19

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  OSISEK DAMIAN LEO

IPC: G06F20060101

Abstract: Selected installed function of a multi-function instruction is hidden such that even though a processor is capable of performing the hidden installed function, the availability of the hidden function is hidden such that responsive to the multi-function instruction querying the availability of functions, only functions not hidden are reported as installed.

公开(公告)号：SG186103A1

公开(公告)日：2013-01-30

申请号：SG2012087862

申请日：2010-11-08

Applicant: IBM

Inventor： SITTMANN GUSTAV III ,  CRADDOCK DAVID ,  GREGG THOMAS ,  SCHMIDT DONALD WILLIAM ,  BELMAR BRENTON FRANCOIS ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  TARCZA RICHARD ,  EASTON JANET

Abstract: The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on all central processing units in the configuration. The operating system processes the interruption, including examining and processing indicators of reported events until the operating system discontinues the suppression. This enables the operating system to control the number of pending interruptions and the number of processors processing those interruptions.

公开(公告)号：MX2012014529A

公开(公告)日：2013-01-29

申请号：MX2012014529

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  OSISEK DAMIAN LEO ,  SLEGEL TIMOTHY ,  HELLER LISA

IPC: G06F9/455 ,  G06F9/30

Abstract: En un procesador que soporta ejecución de una pluralidad de funciones de una instrucción, un valor de bloqueo de instrucción se ajusta para bloquear una o más de la pluralidad de funciones, tal que un intento por ejecutar una de las funciones bloqueadas, resultará en una excepción de programa y la instrucción no se ejecutará, sin embargo la misma instrucción será capaz de ejecutar cualquiera de las funciones que no son funciones bloqueadas.

公开(公告)号：AU2010355815A1

公开(公告)日：2012-12-20

申请号：AU2010355815

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  OSISEK DAMIAN LEO ,  SLEGEL TIMOTHY

IPC: G06F9/455 ,  G06F9/30 ,  G06F9/318

Abstract: Selected installed function of a multi-function instruction is hidden such that even though a processor is capable of performing the hidden installed function, the availability of the hidden function is hidden such that responsive to the multi- function instruction querying the availability of functions, only functions not hidden are reported as installed.

公开(公告)号：AU2010355814A1

公开(公告)日：2012-12-20

申请号：AU2010355814

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  OSISEK DAMIAN LEO ,  SLEGEL TIMOTHY ,  HELLER LISA

IPC: G06F9/455 ,  G06F9/30

Abstract: In a processor supporting execution of a plurality of functions of an instruction, an instruction blocking value is set for blocking one or more of the plurality of functions, such that an attempt to execute one of the blocked functions, will result in a program exception and the instruction will not execute, however the same instruction will be able to execute any of the functions that are not blocked functions.

公开(公告)号：CA2800623A1

公开(公告)日：2011-12-29

申请号：CA2800623

申请日：2010-11-08

Applicant: IBM

Inventor： SITTMANN GUSTAV III ,  CRADDOCK DAVID ,  GREGG THOMAS ,  SCHMIDT DONALD WILLIAM ,  BELMAR BRENTON FRANCOIS ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  TARCZA RICHARD ,  EASTON JANET

IPC: G06F9/48

Abstract: The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on all central processing units in the configuration. The operating system processes the interruption, including examining and processing indicators of reported events until the operating system discontinues the suppression. This enables the operating system to control the number of pending interruptions and the number of processors processing those interruptions.