公开(公告)号：DE19901206C2

公开(公告)日：2003-02-06

申请号：DE19901206

申请日：1999-01-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KAISER ROBERT ,  SCHAMBERGER FLORIAN

IPC: G06F11/20 ,  G11C29/00

公开(公告)号：DE10115293A1

公开(公告)日：2002-10-17

申请号：DE10115293

申请日：2001-03-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KAISER ROBERT ,  SCHAMBERGER FLORIAN

IPC: G06F11/00 ,  G06F11/10 ,  G11C16/20 ,  G11C29/44 ,  G11C16/10

公开(公告)号：DE10102871A1

公开(公告)日：2002-08-14

申请号：DE10102871

申请日：2001-01-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KAISER ROBERT ,  SCHAMBERGER FLORIAN ,  SCHNEIDER HELMUT

IPC: G11C29/48 ,  G01R31/3187 ,  G11C29/00 ,  H04L7/00

公开(公告)号：DE10063685A1

公开(公告)日：2002-07-18

申请号：DE10063685

申请日：2000-12-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHAMBERGER FLORIAN ,  KAISER ROBERT

IPC: G11C17/16 ,  G11C17/18 ,  G11C29/00 ,  H01L23/525

Abstract: A circuit configuration for driving a programmable link, for example a fuse, is specified, having a drive circuit for driving the fuse in a manner dependent on a signal present at the data input, and also a volatile memory, whose output is preferably directly connected to the data input of the drive circuit. A circuit configuration for particularly fast and simple programming of fuses, in particular electrically programmable fuses, is thereby specified.

公开(公告)号：DE59901650D1

公开(公告)日：2002-07-11

申请号：DE59901650

申请日：1999-07-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KAISER ROBERT ,  SCHAMBERGER FLORIAN

IPC: G01R31/28 ,  G01R31/3181 ,  G06F9/445 ,  G06F11/22 ,  G06F11/273 ,  G11C29/00 ,  G11C29/12

Abstract: An integrated circuit includes a self-test device which is provided for executing a self-test of the integrated circuit and which has a control output. A program memory is connected to the self-test device for storing at least one test program supplied from outside the integrated circuit. The test program is run by the self-test device during execution of a self-test. The self-test device controls loading of a respective test program to be run into the program memory from outside the integrated circuit through the control output thereof.

公开(公告)号：DE10062094A1

公开(公告)日：2002-07-11

申请号：DE10062094

申请日：2000-12-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KAISER ROBERT ,  SCHAMBERGER FLORIAN

IPC: G11C17/16 ,  G11C29/38 ,  G11C29/00

Abstract: Electrical fuses (1) and a test fuse (4) connect to a test circuit (7) so that data in the electrical fuses and the test fuse can be read out into the test circuit, which is designed in such a way that it determines whether an item of data in one of the electrical fuses is defective. Data written in the electrical fuses and the electrical test fuse is processed according to a function for identifying whether data has been written incorrectly in one of the electrical fuses. An Independent claim is also included for a method for recognizing a defective electrical fuse in an integrated circuit.

公开(公告)号：DE10055001A1

公开(公告)日：2002-05-16

申请号：DE10055001

申请日：2000-11-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BROX MARTIN ,  KAISER ROBERT ,  PFEFFERL PETER ,  DOMINIQUE SAVIGNAC ,  SCHNEIDER HELMUT

IPC: G11C11/401 ,  G11C5/02 ,  H01L21/8242 ,  H01L23/485 ,  H01L23/50 ,  H01L27/108 ,  H01L27/10

Abstract: The arrangement has cell fields (2-9) bounding on a central connector field (1), whereby a cell field has a matrix memory with row and column decoders (10,11) connected to address lines (12,13) and the connector field has connection pads electrically connected to the cell fields. A cell field is arranged at each of the four side edges of the connector field. The cell fields are arranged in a closed rim around the connector field.

公开(公告)号：DE10006236A1

公开(公告)日：2001-09-06

申请号：DE10006236

申请日：2000-02-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KAISER ROBERT ,  SCHAMBERGER FLORIAN ,  SCHNEIDER HELMUT ,  KRASSER HANS-JUERGEN

IPC: G01R31/28 ,  G01R31/3183 ,  G01R31/3185 ,  H03K5/13 ,  H03K5/131 ,  H03K5/133 ,  G01R31/3187 ,  H03K5/14

Abstract: In the configuration, the module can "learn" one or more time intervals from the external tester and then repeat them internally or compare them to its own internally measured time intervals, for instance, for the purpose of evaluating whether the module in question has crossed a time specification value or remains below the value. The module can also measure and store one or more internal time intervals and transmit them to the external tester in digital or analog form.