公开(公告)号：JPH03211739A

公开(公告)日：1991-09-17

申请号：JP796990

申请日：1990-01-16

Applicant: SHARP KK

Inventor： MIYAJIMA TOSHIAKI ,  MATSUNAMI MITSUO ,  YOSHIOKA MINORU ,  YOSHIKAWA TOSHIBUMI ,  OKADA MASATAKE

IPC: H01L21/20 ,  H01L21/337 ,  H01L29/808

Abstract: PURPOSE:To obtain high transfer coefficient by providing a high concentration first conductivity type epitaxial semiconductor region connected to a second gate electrode on a second conductivity type epitaxial semiconductor layer and high concentration second conductivity type epitaxial semiconductor region connected to source, drain electrodes on a region for surrounding it and at both sides. CONSTITUTION:After an insulating film 2 is formed on a substrate 1, an n-type impurity-doped non-single crystalline silicon film 3, and a surface protective film 4 made of silicon oxide are formed. In this state, a laser beam 5 is emitted to convert the film 3 into a single crystalline silicon film 6. After the film 4 is removed, the film 6 is formed in a desired shape single crystalline silicon film 6'. Then a p-type impurity-doped single crystalline silicon film 7 is epitaxially grown only on the film 6'. On the film 7, an n-type region 8 and a high concentration p-type region 9, 10 are formed by ion implantation and the like. An p-type single crystalline silicon film 7 is partly etched until it arrives at the film 6', and high concentration n-type regions 11, 12 are formed partly on the film 6', n-type region 8.

公开(公告)号：JPH0337745B2

公开(公告)日：1991-06-06

申请号：JP15715281

申请日：1981-09-30

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  NAKAKURA YUKINORI

IPC: H01L31/12 ,  H01L29/74 ,  H01L31/111

公开(公告)号：JPS6319882A

公开(公告)日：1988-01-27

申请号：JP16431686

申请日：1986-07-11

Applicant: SHARP KK

Inventor： ITO TAKUYA ,  YOSHIKAWA TOSHIBUMI

IPC: H01L31/10 ,  H01L31/0352

Abstract: PURPOSE:To accelerate the response speed of photodiode by reducing slow current component by a method wherein the thickness of substrate below a photodiode is made thinner than that of the part other than the part below the photodiode. CONSTITUTION:A P type silicon substrate 1 is made thinner below a photodiode part 3 by anisotropic etching process. Resultantly, the thickness t1 of P type silicon substrate 1 below the photodiode 3 is thinner than the thickness t2 of the part other than the part below the photodiode part 3. The response speed of photodiode is proportional to 1/2 of the distance from the end of P type silicon substrate to the junction with an N type epitaxial layer. Through these procedures, the response speed of photodiode can be accelerated by making the P type silicon substrate 1 thinner while the sensitivity thereof may sometimes deteriorate but almost negligibly.

公开(公告)号：JPS6222273B2

公开(公告)日：1987-05-16

申请号：JP12021478

申请日：1978-09-28

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  TANI YOSHIHEI ,  ASO AKIRA ,  KAWANABE HITOSHI

IPC: H01L31/10 ,  H01L31/00

公开(公告)号：JPS62101076A

公开(公告)日：1987-05-11

申请号：JP24215985

申请日：1985-10-28

Applicant: SHARP KK

Inventor： KUBO MASARU ,  OKADA KEIICHI ,  YOSHIOKA MINORU ,  ITO TAKUYA ,  YOSHIKAWA TOSHIBUMI

IPC: H01L29/08 ,  H01L29/78

Abstract: PURPOSE:To obtain a high dielectric strength V-MOS-FET whose ON resistance is reduced without increasing the chip size by forming a buried layer with a low specific resistivity on a part of the boundary between a semiconductor substrate and an epitaxial layer facing a gate. CONSTITUTION:In a power MOS-FET, after an N type diffused region 11 is formed in an N type semiconductor substrate 1, an N-type epitaxial layer 3 is formed. When the epitaxial layer 3 is formed, a part of the N type impurity migrates from the diffused region 11 into the epitaxial layer 3 and an N type buried layer 12 is formed. The buried layer 12 is formed at the position facing a gate 9. A source 5 and the gate 9 are formed on the surface part of the epitaxial layer 3 to obtain an N-type channel vertical power MOS-FET. With this constitution, as the buried layer with a low specific resistivity is provided, a vertical insulated gate type field effect semiconductor device whose ON resistance can be reduced without increasing the chip size can be obtained.

公开(公告)号：JPS6150246B2

公开(公告)日：1986-11-04

申请号：JP12021378

申请日：1978-09-28

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  TANI YOSHIHEI ,  ASO AKIRA ,  KAWANABE HITOSHI

IPC: G01J3/51 ,  G01J1/44 ,  G01J3/427 ,  G01J3/50 ,  G01J9/00 ,  H01L31/11

公开(公告)号：JPS5952973B2

公开(公告)日：1984-12-22

申请号：JP3904679

申请日：1979-03-30

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  TANI YOSHIHEI

IPC: G01J1/44 ,  G01J9/00 ,  H01L27/14 ,  H01L31/02 ,  H01L31/107

公开(公告)号：JPS5996784A

公开(公告)日：1984-06-04

申请号：JP20718582

申请日：1982-11-25

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  KUBO MASARU ,  NAGAO HISAO ,  NISHIMOTO NOBUHIRO

IPC: H01L31/12 ,  H01L31/10 ,  H01L31/103

Abstract: PURPOSE:To enable to prevent the malfunction due to pulse impression by increasing the sensitivity to a light and reducing the effect by the electrostatic coupling between a light emitting and a light receiving element by improving the structure of a P-N junction which generates a photocurrent by receiving the light. CONSTITUTION:A photo diode as the light receiving element has two P-N junctions, the P-N junction due to an N type epitaxial layer 1 and a P type diffused region 5 and the P-N junction electrically in parallel relation therewith and due to the P type diffused region 5 and an N type diffused region 7 extended on this P type diffused region 5. By such a structure, the upper surface part of the P type diffused region 5 is, except the contact part thereof, covered with the extended N type diffused region 7, and the capacitor is formed mainly to an N type, therefore the effect by the electrostatic coupling on the light receiving element is reduced. Besides, it follows that this structure has the two P-N junctions, which is useful also to improve the sensitivity with respect to the light of the photo diode.

公开(公告)号：JPS5992581A

公开(公告)日：1984-05-28

申请号：JP20313882

申请日：1982-11-18

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  KUBO MASARU ,  NAGAO HISAO ,  NISHIMOTO NOBUHIRO

IPC: H01L31/12

Abstract: PURPOSE:To reduce the influence by the electrostatic coupling between a light emitting and a light receiving element and prevent malfunction by a method wherein the part except an N type contact part is covered with a P type extended region connected to a P isolation region and is set at a ground potential. CONSTITUTION:The first photo diode is formed of a P type substrate 11, a P type isolation region 12, and an N type epitaxial layer 13. The second photo diode is formed of the P type extended region 14, connected to the region 12 in parallel connection to the first photo die and positioned at the upper surface part of the layer 13, and the region 13 connected thereto. This constitution cause part except the N type contact part 15 to be set at a ground potential by being covered with the region 14 connected to the region 12 at the upper surface part of the layer 13. As a result, the influence by the electrostatic coupling between the light emitting and light receiving elements, and accordingly the malfunction of the light receiving element can be prevented.

公开(公告)号：JPS58140160A

公开(公告)日：1983-08-19

申请号：JP2323982

申请日：1982-02-15

Applicant: SHARP KK

Inventor： YOSHIKAWA TOSHIBUMI ,  NAKAKURA YUKINORI

IPC: H01L31/111 ,  H01L29/74 ,  H01L31/11

Abstract: PURPOSE:To omit the complicated process of a semiconductor device by a method wherein base width of the P-N-P transistor is made to be the most suitable, the current amplification factor and photosensitivity are enlarged, moreover gate resistance is reduced, and the transistor is formed in a chip the same with a photo thyristor. CONSTITUTION:Boron of P type impurity is diffused to 5-60mum at the prescribed places of an N type substrate 1 to form an anode 2, a gate 3. Then phos phorus of N type impurity is diffused in the gate 3 to form a cathode 4. An anode electrode 6, a gate electrode 7 and a cathode electrode 8 of Al respectively are provided in the regions 2, 3, 4 thereof. By making base width of the P-N- P transistor to be contained in the photo thyristor to be the most suitable, while by providing a phosphorus diffusion region S at the circumference of the chip surrounding the element region provided with the anode 2 and the cathode 4, the current amplification factor is enlarged, nd moreover gate resistance is reduced.