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公开(公告)号：KR1020110055022A
公开(公告)日：2011-05-25
申请号：KR1020090111879
申请日：2009-11-19
Applicant: 한국전자통신연구원
IPC: H04N7/24
CPC classification number: H04N19/436 , H04N19/44 , H04N19/61
Abstract: PURPOSE: A video encoding apparatus and method thereof based on a data functional method are provided to maximize the parallelism and availability of a decoding process after separating bit stream regardless of data dependency. CONSTITUTION: A variable length decoding unit(410) performs variable length encoding/parsing and separates an encoding parameter based on a function partition method. MB(Macro Block) process information of a cluster and an encoding parameter is obtained by separating encoding function.
Abstract translation: 目的：提供一种基于数据功能方法的视频编码设备及其方法，用于在分离比特流之后使解码过程的并行性和可用性最大化，而与数据依赖性无关。 构成：可变长度解码单元（410）执行可变长度编码/解析，并且基于功能分区方法分离编码参数。 通过分离编码功能获得集群的MB（宏块）处理信息和编码参数。
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公开(公告)号：KR1020110045601A
公开(公告)日：2011-05-04
申请号：KR1020090102241
申请日：2009-10-27
Applicant: 한국전자통신연구원
CPC classification number: G06F1/3237 , G06F1/3225 , G06F1/3275 , G06F1/3287 , G06F12/0875 , Y02D10/128 , Y02D10/13 , Y02D10/14 , Y02D10/171
Abstract: PURPOSE: An energy scalable vector processing apparatus including a core cluster and a method thereof are provided to regulate the amount of energy consumption by making the core cluster share a cache memory. CONSTITUTION: A cache memory(130-6) stores and offers a command or a data. A core(110-6) performs calculation by accessing the cache memory or a cache memory which is installed in other adjacent core cluster. If the core requests a memory access, a cluster cache controller(120-6) accesses the core to the cache memory. If the core requests a clustering to the adjacent core cluster, the cluster cache controller accesses the core to the cache memory included in the adjacent core cluster.
Abstract translation: 目的：提供一种包括核心簇及其方法的能量可缩放向量处理装置，以通过使核心群集共享缓存存储器来调节能量消耗量。 构成：缓存存储器（130-6）存储并提供命令或数据。 核心（110-6）通过访问安装在其他相邻核心群集中的高速缓冲存储器或高速缓冲存储器来执行计算。 如果核心请求存储器访问，则集群高速缓存控制器（120-6）将核心访问高速缓冲存储器。 如果核心请求到相邻核心群集的群集，则群集高速缓存控制器将核心访问到相邻核心群集中包括的高速缓存存储器。
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公开(公告)号：KR1020110023513A
公开(公告)日：2011-03-08
申请号：KR1020090081450
申请日：2009-08-31
Applicant: 한국전자통신연구원
CPC classification number: G06F9/342 , G06F9/3824
Abstract: PURPOSE: A memory access method of a processor command and a device thereof are provided to reduce a stack memory access frequency for a local variable access by configuring a local stack storing unit in a processor. CONSTITUTION: A stack offset extracting unit(220) extracts an offset value from a stack pointer offset expressing a local variable in a processor command. A local stack storing unit(240) includes a plurality of items. An offset comparing unit(230) compares an offset value and an offset value of an item to determine existence of an item corresponding to the extracted offset value in the local stack storing unit. The offset comparing unit enables a processor to be accessed to the local stack storing unit or a cache memory according a determination result.
Abstract translation: 目的：提供处理器命令的存储器访问方法及其装置，以通过在处理器中配置本地堆栈存储单元来减少用于局部变量访问的堆栈存储器访问频率。 构成：堆栈偏移提取单元（220）从处理器命令中表示局部变量的堆栈指针偏移提取偏移值。 本地堆叠存储单元（240）包括多个项目。 偏移比较单元（230）比较项目的偏移值和偏移值，以确定与本地堆栈存储单元中提取的偏移值相对应的项目的存在。 偏移比较单元使得处理器可以根据确定结果被访问到本地堆栈存储单元或高速缓存存储器。
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公开(公告)号：KR100994983B1
公开(公告)日：2010-11-18
申请号：KR1020080111627
申请日：2008-11-11
Applicant: 한국전자통신연구원
IPC: H04N19/433 , H04N19/51
CPC classification number: H04N19/00587 , H04N19/433 , H04N19/51 , H04N19/523
Abstract: 본 발명은 공유 가능한 다중 입출력 뱅크 메모리 구조를 갖는 고속 움직임 탐색에 관한 것으로서, 고속 움직임 탐색 장치는, 외부의 프레임 메모리로부터 현재 영역의 화소 데이터를 수신하여 저장하는 현재 영역 메모리; 공유 가능한 다중 입출력 뱅크 형태로 상기 프레임 메모리로부터 읽어온 탐색영역의 화소 데이터를 저장하고, 상기 현재 영역의 화소 데이터와 탐색영역의 화소 데이터를 이용하여 정수배 움직임 벡터를 예측하는 정수배 움직임 탐색기; 및 상기 정수배 움직임 탐색기로부터 탐색영역이 공유 가능하다는 신호를 수신하면, 상기 정수배 움직임 탐색기로부터 탐색영역의 화소 데이터를 읽어오고, 읽어온 탐색영역의 화소 데이터 및 상기 정수배 움직임 탐색기에서 예측된 정수배 움직임 벡터를 이용하여 소수배 움직임 벡터를 예측하는 소수배 움직임 탐색기를 포함하여 고속의 움직임 탐색을 수행함을 특징으로 하며, 이로 인해 외부 프레임 메모리와의 입출력을 최소화할 수 있으며, 움직임 백터 예측 시 SAD 계산에 필요한 탐색 범위 및 화소 수를 영상의 품질이 저하되지 않는 범위에서 줄일 수 있다.
고속 움직임 탐색 장치, 정수배 움직임 탐색기, 소수배 움직임 탐색기, 다중 입출력 뱅크 메모리, 화소 데이터, 매크로 블록, SAD.-
公开(公告)号：KR100976628B1
公开(公告)日：2010-08-18
申请号：KR1020080043605
申请日：2008-05-09
Applicant: 한국전자통신연구원
CPC classification number: G06F9/3885 , G06F9/38 , G06F15/17375
Abstract: 다중 프로세서 시스템 및 그 시스템에서의 다중 프로세싱 방법에 관한 것으로서, 상기 다중 프로세서 시스템은 데이터 코어 및 프로세싱 코어로 이루어진 다수의 프로세서; 및 상기 각 프로세서에 포함된 데이터 코어와 프로세싱 코어를 데이터 코어-프로세싱 코어 쌍의 임의의 조합으로 연결하는 스위치를 포함함으로써, 통신을 위한 오버헤드를 없애고, 프로그래밍을 쉽고 간단히 할 수 있다.
다중 프로세서 시스템, 프로세서, 데이터 코어, 프로세싱 코어, 스위치, PPDM, PKDM.-
Patent Agency Ranking
公开(公告)号：KR1020100073029A
公开(公告)日：2010-07-01
申请号：KR1020080131607
申请日：2008-12-22
Applicant: 한국전자통신연구원
CPC classification number: G09G5/39 , G09G2360/123 , G09G2360/128 , H04N19/423
Abstract: PURPOSE: An image processing apparatus and a frame managing method for the same are provided to efficiently support an interlace scanning by changing a line distance and accessing to selected frame/field in each macro block. CONSTITUTION: A host interface bus(110) transfers initializing information and image data stream for each functional module from a host system(200). A stream(121) acquires and buffers the image data stream and provides the image data stream to a stream controller(122). The stream controller interprets the image data stream and distributes data.
Abstract translation: 目的：提供一种用于其的图像处理装置和帧管理方法，以通过改变行距离和访问每个宏块中所选择的帧/场来有效地支持隔行扫描。 构成：主机接口总线（110）从主机系统（200）传送每个功能模块的初始化信息和图像数据流。 流（121）获取并缓冲图像数据流，并将图像数据流提供给流控制器（122）。 流控制器解释图像数据流并分发数据。
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公开(公告)号：KR1020100071784A
公开(公告)日：2010-06-29
申请号：KR1020080130619
申请日：2008-12-19
Applicant: 한국전자통신연구원
CPC classification number: G06F1/08 , G06F1/3203 , G06F1/324 , G06F9/3869 , G06F9/3873 , Y02D10/126
Abstract: PURPOSE: A processor capable of power consumption scaling is provided to adjust the energy consumption of a processor according to supplied energy capacity by controlling the operating frequency of the processor. CONSTITUTION: Functional units(111-117) performs functions thereof in order, and a pipeline resister sets(121-126) are respectively formed between the functional units, stores the calculation result values of the functional units and have a bypass function. A system clock controller(130) applies a clock signal to the pipeline register sets. A bypass controller(140) applies a bypass signal to a certain pipeline resister set selected from the pipeline register sets according to the set condition.
Abstract translation: 目的：提供能够进行功耗缩放的处理器，通过控制处理器的工作频率，根据提供的能量容量来调节处理器的能耗。 构成：功能单元（111-117）依次执行功能，功能单元之间分别形成流水线寄存器组（121-126），存储功能单元的计算结果值并具有旁路功能。 系统时钟控制器（130）将时钟信号施加到流水线寄存器集合。 旁路控制器（140）根据设定条件将旁路信号施加到从流水线寄存器组中选择的某个流水线电阻集合。
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公开(公告)号：KR1020100066294A
公开(公告)日：2010-06-17
申请号：KR1020090031778
申请日：2009-04-13
Applicant: 한국전자통신연구원
Abstract: PURPOSE: A cancer treatment apparatus for base penetration type is provided to prevent a damage of a normal cell by irradiating a particle beam with closing to a cancer cell generated inside of a therapeutic target. CONSTITUTION: A particle beam output(110) irradiates the particle beam on a lesion site formed inside a therapeutic target. The particle beam output is inserted inside the therapeutic target. The particle beam output includes a particle beam generating unit(111) and a particle beam output unit(112). A medical device body is physically connected with the particle beam output. The medical device body supports a therapeutic target interpolation of the particle beam output. A controller(120) controls a driving of the particle beam output.
Abstract translation: 目的：提供一种用于基底穿透型的癌症治疗装置，以通过向处理靶内产生的癌细胞照射粒子束来防止正常细胞的损伤。 构成：粒子束输出（110）将颗粒束照射在形成在治疗靶内的病变部位。 粒子束输出插入治疗靶内。 粒子束输出包括粒子束产生单元（111）和粒子束输出单元（112）。 医疗器械主体与粒子束输出物理连接。 医疗装置主体支持粒子束输出的治疗目标插值。 控制器（120）控制粒子束输出的驱动。
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公开(公告)号：KR1020100063615A
公开(公告)日：2010-06-11
申请号：KR1020090027975
申请日：2009-04-01
Applicant: 한국전자통신연구원
Abstract: PURPOSE: An apparatus and a method for processing a VLIW instruction are provided to select one of instructions in a VLIW instruction according to a processing result of a condition branch instruction to process the selected instruction, thereby improving processing efficiency of a VLIW architecture. CONSTITUTION: A VLIW(Very Long Instruction Word) instruction processing apparatus comprises an instruction selecting unit(10) and a selection instruction executing unit(20). The instruction selecting unit selects at least one instruction among VLIW instructions according to instruction selection conditions. The command selection conditions are generated in the previous cycle. The selection instruction executing unit processes the selected instruction. The selection instruction executing unit generates an instruction processing result value and a new instruction selecting condition.
Abstract translation: 目的：提供一种用于处理VLIW指令的装置和方法，以根据条件分支指令的处理结果来选择VLIW指令中的一个指令以处理所选择的指令，从而提高VLIW架构的处理效率。 构成：VLIW（超长指令字）指令处理装置包括指令选择单元（10）和选择指令执行单元（20）。 指令选择单元根据指令选择条件选择VLIW指令中的至少一个指令。 命令选择条件在上一个循环中生成。 选择指令执行单元处理所选择的指令。 选择指令执行单元生成指令处理结果值和新指令选择条件。
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公开(公告)号：KR1020100052773A
公开(公告)日：2010-05-20
申请号：KR1020080111627
申请日：2008-11-11
Applicant: 한국전자통신연구원
IPC: H04N19/433 , H04N19/51
CPC classification number: H04N19/00587 , H04N19/433 , H04N19/51 , H04N19/523
Abstract: PURPOSE: A high speed motion estimating apparatus and a method thereof are provided, which can proceed a high-speed motion estimating by input-output pixel data which is necessary for calculation SAD(Sum Absolute Difference) within multiple input/output bank memory. CONSTITUTION: An integral motion detector(110) predicts an integral motion vector through a pixel date of present area memory(130) and pixel data of search area. If a shareable signal about a search area is received from the integral motion detector, a decimal motion detector(120) reads pixel data of a search area. The decimal motion detector predicts decimal motion vector through pixel data of the search area and predicted integral motion vector.
Abstract translation: 目的：提供一种高速运动估计装置及其方法，其可以通过在多个输入/输出存储体存储器内的计算SAD（绝对差）求和所需的输入输出像素数据进行高速运动估计。 构成：积分运动检测器（110）预测通过当前区域存储器（130）的像素日期和搜索区域的像素数据的积分运动矢量。 如果从积分运动检测器接收到关于搜索区域的共享信号，则小数运动检测器（120）读取搜索区域的像素数据。 十进制运动检测器通过搜索区域的像素数据和预测的积分运动矢量来预测小数运动矢量。
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