VARIABLE CAPACITANCE CIRCUIT
    71.
    发明申请
    VARIABLE CAPACITANCE CIRCUIT 审中-公开
    可变电容电路

    公开(公告)号:WO1982002302A1

    公开(公告)日:1982-07-08

    申请号:PCT/US1981001450

    申请日:1981-10-28

    Applicant: MOTOROLA INC

    CPC classification number: H03G5/28 H03H11/481

    Abstract: Un circuit (10) possede une impedance d'entree variable qui est commandee par application d'un signal d'entree en courant continu. Le circuit d'impedance variable comprend une paire de condensateurs (12, 14) couples en serie avec une paire de diodes (32, 34). Les diodes sont rendues conductrices en reponse au signal de commande en courant continu pour cour-circuiter sensiblement les deux condensateurs en serie entre eux sur les bornes d'entree (7, 18) du circuit. Lorsqu'aucun signal de commande n'est applique sur le circuit, les diodes sont non conductrices, ce qui deconnecte les condensateurs des entrees du circuit. Par consequent, la composante de reactance de l'impedance d'entree du circuit varie en reponse au signal de commande en courant continu.

    DRIVER CIRCUIT HAVING REDUCED CROSS-OVER DISTORTION
    72.
    发明申请
    DRIVER CIRCUIT HAVING REDUCED CROSS-OVER DISTORTION 审中-公开
    具有减少的交叉失真的驱动电路

    公开(公告)号:WO1982002128A1

    公开(公告)日:1982-06-24

    申请号:PCT/US1981001446

    申请日:1981-10-28

    Applicant: MOTOROLA INC

    Abstract: Un circuit de commande (10) approprie a une utilisation dans un amplificateur operationnel, comprend un transistor de redressement bipolaire (36) qui envoie un courant a une borne de sortie (38) proportionnellement a un courant de commande applique, et un transistor de rabaissement MOS (48) qui affaiblit le courant provenant de la borne de sortie (38) proportionnellement a une tension de commande appliquee. Un transistor de commande MOS (32) fournit un courant de commande constant pour le transistor de redressement (36), et un transistor de shuntage MOS (44) shunte le courant de commande en l'eloignant du transistor bipolaire (36) proportionnellement a la tension de commande. Un circuit de compensation de convergence (14) developpe une tension de polarisation predeterminee sur la base du transistor bipolaire (36) par rapport a la tension sur la borne de sortie (38) pour assurer un niveau minimum de fonctionnement du transistor bipolaire (36) lorsque la borne de sortie (38) est proche de la tension de terre analogique.

    RADIO MANUAL TUNING CIRCUIT
    73.
    发明申请
    RADIO MANUAL TUNING CIRCUIT 审中-公开
    无线电手动调谐电路

    公开(公告)号:WO1982001291A1

    公开(公告)日:1982-04-15

    申请号:PCT/US1981001020

    申请日:1981-07-29

    Applicant: MOTOROLA INC

    CPC classification number: H03J3/12

    Abstract: A manual tuning circuit for an AM and/or FM radio (10) in which the magnitude of the radio audible signals is intentionally varied in accordance with the magnitude of an error signal related to the absolute difference between the frequency of a desired received modulated carrier signal and the frequency to which the radio front end (11-17) is tuned. In this manner, precisely tuning the radio front end to precisely the desired frequency can be obtained by tuning for the maximum volume of radio audible signals. Preferably, this is accomplished through the use of full wave rectification of either the FM discriminator (35) DC output voltage or full wave rectification of the control voltage for a voltage controlled oscillator (VCO) (26) in a phase locked loop (24) which tracks the IF output signal of an AM/FM radio IF stage (16).

    Abstract translation: 一种用于AM和/或FM无线电(10)的手动调谐电路,其中无线电可听信号的幅度根据与期望的接收调制载波的频率之间的绝对差有关的误差信号的幅度有意地改变 信号和无线电前端(11-17)调谐到的频率。 以这种方式,通过调谐无线电可听信号的最大音量可以获得将无线电前端精确地调谐到所需频率的精确度。 优选地,这是通过对锁相环(24)中的压控振荡器(VCO)(26)的FM鉴频器(35)DC输出电压或控制电压的全波整流进行全波整流来实现的, 其跟踪AM / FM无线电IF级(16)的IF输出信号。

    SELF-CLOCKING DATA TRANSMISSION SYSTEM
    75.
    发明申请
    SELF-CLOCKING DATA TRANSMISSION SYSTEM 审中-公开
    自锁数据传输系统

    公开(公告)号:WO1982001111A1

    公开(公告)日:1982-04-01

    申请号:PCT/US1981001094

    申请日:1981-08-14

    Applicant: MOTOROLA INC

    CPC classification number: H04L1/02 H04L5/1423 H04L25/4904

    Abstract: Systeme de transmission de donnees ou des signaux de donnees sont transmis par le transmetteur (101 et Fig. 2) avec quatre etats binaires possibles a deux bits des lignes de signaux des donnees verifiees (221) et des donnees complementaires (220). Un etat de texte est prevu avant et apres le signal de donnees et un etat un ou un etant zero suivi d'un etat de bit est prevu pour chaque bit du signal de donnees. Les recepteurs de donnees (102, 103, 104, et Fig. 3) detectent l'etat de bit pour recuperer un signal d'horloge binaire (311) et detecter l'etat un et l'etat zero pour recuperer un signal de donnee NRZ (305, 306). En reponse au signal d'horloge de bit, le signal de donnees NRZ est introduit par decalage seriel dans un registre (312) tandis qu'un signal de donnees de retour charge anterieurement en parallele est sorti par decalage du registre (312) et est applique (314, 315, 316) a la ligne de signaux de donnees de retour.

    Abstract translation: 描述了一种数据传输系统,其中数据信号在数据发射机和多个数据接收机之间以真实数据和补码数据信号线和不归零(NRZ)载波的自定时比特流双向传输, 返回数据信号线上的位流。 根据本发明的数据传输方案,通过利用真实数据和补码数据信号线的四个可能的两位二进制状态,数据发送器发送数据信号。 在四个二位二进制状态中,在数据信号之前和之后提供字状态,并且为数据信号的每个位提供一个状态或零状态,随后是位状态。 数据接收器检测位状态以恢复位时钟信号并检测一个状态和零状态以恢复NRZ数据信号。 响应于位时钟信号,NRZ数据信号被串行地移入寄存器,而先前并行加载的返回数据信号从寄存器中移出并施加到返回数据信号线。 本发明的数据传输方案是自时钟的,并且高度免疫传输中的速度和时序变化。 本发明的数据传输可以有利地用于许多不同数据传输系统中的数据传输,诸如用于微处理器和外围设备之间的数据传输的计算机系统以及用于中央控制站和地理上远程站之间的数据传输的控制系统。

    PHASE CORRECTED CLOCK SIGNAL RECOVERY CIRCUIT
    76.
    发明申请
    PHASE CORRECTED CLOCK SIGNAL RECOVERY CIRCUIT 审中-公开
    相位校正时钟信号恢复电路

    公开(公告)号:WO1982000742A1

    公开(公告)日:1982-03-04

    申请号:PCT/US1981000885

    申请日:1981-06-29

    Applicant: MOTOROLA INC

    CPC classification number: H04L7/033 H04L7/027

    Abstract: As shown in Fig. 4 a phase corrected clock signal recovery circuit (150) for multilevel digital signals includes a transition marker generator (200) for generating a narrow width pulse each time a received multilevel digital signal crosses one of the threshold levels between the adjacent logic levels of multilevel signal. Picket fence-like pulse trains are thus formed, the pulses (transition markers) of which correspond to the threshold crossings of the received digital signal. The pulse trains are interspersed with spaces or eye intervals which correspond to the absence of any threshold crossings. Each eye interval additionally corresponds to the time during which each respective bit of digital signal information is transmitted. The rate of occurrence of the pulse trains is substantially equal to the clock frequency of the received digital signal. A phase error detection circuit (400) is operatively coupled to the output of the transition marker generator (200) and to an electronically tune bandpass filter (300) capable of adjusting the phase of the pulse trains. More specifically, the phase error detection circuit (400) includes an up/down counter (410, 411) and adjusts the phase of the clock signal recovered from the pulse trains such that the number of transition markers generated during the high portion of the clock signal equals the number of transition markers generated during the low portion of the clock signal. Thus, selected transitory edges of the pulses of the recovered clock signal are centered at the middles of the respective eye intervals, that is, at the points in time when each respective bit of multilevel digital signal information occurs. This phase corrected recovered clock signal is conveniently applied to appropriate sampling circuitry to enable sampling of the multilevel digital signal at optimum times, that is, at the center of the eye intervals.

    Abstract translation: 如图所示。 如图4所示,用于多电平数字信号的相位校正时钟信号恢复电路(150)包括用于每当接收的多电平数字信号跨越多电平信号的相邻逻辑电平之间的阈值电平之一时产生窄宽度脉冲的转换标记发生器(200) 。 因此,形成了栅栏状的脉冲序列,其脉冲(转换标记)对应于接收的数字信号的阈值交叉。 脉冲串散布有空格或眼睛间隔,对应于没有任何阈值交叉。 每个眼睛间隔另外对应于发送数字信号信息的每个相应位的时间。 脉冲串的发生率基本上等于接收的数字信号的时钟频率。 相位误差检测电路(400)可操作地耦合到转换标记产生器(200)的输出端和能够调节脉冲串相位的电子调谐带通滤波器(300)。 更具体地,相位误差检测电路(400)包括一个向上/向下计数器(410,411),并且调整从脉冲序列恢复的时钟信号的相位,使得在时钟的高部分期间产生的转换标记的数量 信号等于在时钟信号的低部分期间产生的转换标记的数量。 因此,恢复的时钟信号的脉冲的选定的临时边缘以相应的眼睛间隔的中心为中心,即在出现每个相应位的多电平数字信号信息的时间点。 该相位校正的恢复时钟信号方便地应用于适当的采样电路,以便能够在最佳时间,即在眼睛间隔的中心对多电平数字信号进行采样。

    TWO-POLE MONOLITHIC CRYSTAL FILTER
    77.
    发明申请
    TWO-POLE MONOLITHIC CRYSTAL FILTER 审中-公开
    两点单晶晶体过滤器

    公开(公告)号:WO1982000551A1

    公开(公告)日:1982-02-18

    申请号:PCT/US1981000768

    申请日:1981-06-05

    Applicant: MOTOROLA INC

    CPC classification number: H03H9/566 H03H9/0207

    Abstract: Filtre a cristal monolithique bipolaire (200) comprenant des electrodes en bandes mises a la masse (203, 213) entre les electrodes d'entree (201, 21 1) et de sortie (205, 215). Les electrodes en bande mises a la masse (203, 213) possedent une frequence de resonance plus elevee que les electrodes d'entree (201, 211) et de sortie (205, 215), permettent d'obtenir un couplage acoustique ameliore et une capacite (702) reduite entre les electrodes d'entree (201, 211) et de sortie (205, 215), tout en exercant un effet minime ou nul sur les caracteristiques electriques de bande moyenne du filtre. Grace au couplage ameliore, les electrodes d'entree (201, 211) et de sortie (205, 215) peuvent etre espacees d'une distance superieure a la distance possible jusqu'a present dans les filtres a cristal monolithique de l'art anterieur. En outre, des augmentations ulterieures dans le couplage acoustique peuvent etre obtenues en disposant une pluralite d'electrodes en bandes (402, 412; 403, 413; et 404, 414) entre les electrodes d'entree (401, 411) et de sortie (404, 414). Le filtre a cristal monolithique (806) de la presente invention peut etre utilise avantageusement pour le filtrage du signal IF produit dans la partie IF (804) d'un recepteur radio a modulation de frequence (00).

    ENGINE KNOCK SIGNAL PROCESSING CIRCUIT
    78.
    发明申请
    ENGINE KNOCK SIGNAL PROCESSING CIRCUIT 审中-公开
    发动机锁定信号处理电路

    公开(公告)号:WO1982000352A1

    公开(公告)日:1982-02-04

    申请号:PCT/US1981000745

    申请日:1981-06-04

    Applicant: MOTOROLA INC

    CPC classification number: F02P5/152 G01L23/225 Y02T10/46

    Abstract: Analog signal processing circuit (10) for detecting engine knock. A sensor (11) mechanically resonant at characteristic engine knock frequencies provides an analog signal (12) related to engine knock and engine background noise. An envelope detector (15) provides the signal envelope (16) of the sensor signal. An integrator means (17) provides an average signal (18) related to the average of the envelope signal while an attenuator (19) and subsequent filter (20) (integrator) provide an integrated and attenuated signal (21) which responds faster to amplitude changes in the envelope signal (16) than the average signal (18). The integrated and attenuated signal level is set below the average signal level for conditions of no-knock. A comparator (23) receives both the average signal (18) and the integrated and attenuated signal (21) and provides an output signal (27) indicating knock detection in response to the amplitude of the integrated and attenuated signal exceeding the amplitude of the average signal. Preferably the knock detection output (27) of the comparator (23) is latched and the comparator is reset by periodic engine pulses (26).

    Abstract translation: 用于检测发动机爆震的模拟信号处理电路(10)。 在特征性引擎爆震频率下机械共振的传感器(11)提供与发动机爆震和发动机背景噪声相关的模拟信号(12)。 包络检测器(15)提供传感器信号的信号包络(16)。 积分器装置(17)提供与包络信号的平均值相关的平均信号(18),而衰减器(19)和后续滤波器(20)(积分器)提供积分和衰减信号(21),其响应更快到振幅 包络信号(16)的变化大于平均信号(18)。 集成和衰减的信号电平设置在无敲击条件下的平均信号电平以下。 比较器(23)接收平均信号(18)和积分和衰减信号(21),并响应于积分和衰减信号的振幅超过平均值的幅度而提供指示爆震检测的输出信号(27) 信号。 优选地,比较器(23)的爆震检测输出(27)被锁存,并且比较器由周期性的发动机脉冲(26)复位。

    A UNITARY DIE-CAST ASSEMBLY FOR ELECTRONIC CIRCUITS
    79.
    发明申请
    A UNITARY DIE-CAST ASSEMBLY FOR ELECTRONIC CIRCUITS 审中-公开
    电子电路单元电路总成

    公开(公告)号:WO1981003598A1

    公开(公告)日:1981-12-10

    申请号:PCT/US1981000630

    申请日:1981-05-11

    Applicant: MOTOROLA INC

    CPC classification number: H05K5/04 H05K5/03 H05K7/00

    Abstract: Housing for electronic circuits. The housing is designed to deal with the problem caused by the fact that certain types of circuits are sensitive to acoustic vibrations of the housing and that some electronic components of the circuits need to be protected from the heat generated by other components in the housing. The housing includes a unitary die-cast (11) for enclosing electronic circuits within one or more compartments or cavities (13, 15) adapted to receive circuit boards therein. A cavity (15) includes a post (23) centrally located in the bottom and extending upwardly in the middle of the cavity. A fastening device, such as a screw (37), is used to forcibly affix a rigid but flexible cover (31) onto the housing at the center post. The cast and the cover are made of electrically conductive but acoustically dampening material. When the cover is forcibly affixed to cover the cavity, the cover and the chassis provide an acoustically and microphonically dampened housing for the circuit placed therein. The cast includes a wall (51) separating the compartments, and the wall has a cavity (53) along the length thereof and substantially co-extensive therewith for providing a thermal separation between the compartments whereby the wall acts as a thermal insulator.

    Abstract translation: 电子电路外壳。 外壳设计用于处理某些类型的电路对外壳的声音振动敏感的事实,并且电路的一些电子部件需要被保护以免受外壳中的其他部件产生的热量的影响。 壳体包括用于将电子电路封闭在适于在其中接收电路板的一个或多个隔室或空腔(13,15)内的单一压铸件(11)。 空腔(15)包括位于底部中心并在空腔中部向上延伸的柱(23)。 使用诸如螺钉(37)的紧固装置在中心柱处强制地将刚性但柔性的盖(31)固定到壳体上。 铸件和盖子由导电但声阻尼材料制成。 当盖被强制地固定以覆盖空腔时,盖和底盘提供用于放置在其中的电路的声学和微音阻尼外壳。 铸件包括分隔隔室的壁(51),并且壁沿着其长度具有空腔(53)并与其基本上共同延伸,以在隔室之间提供热分离,由此壁用作隔热材料。

    SILICON PRESSURE SENSOR
    80.
    发明申请
    SILICON PRESSURE SENSOR 审中-公开
    硅压力传感器

    公开(公告)号:WO1981003086A1

    公开(公告)日:1981-10-29

    申请号:PCT/US1981000376

    申请日:1981-03-16

    Applicant: MOTOROLA INC

    CPC classification number: H01L29/84 G01L9/0054

    Abstract: A monolithic silicon pressure sensor (10) employing a terminal resistive element (16) is formed in a thin monocrystalline silicon diaphragm (12). The resistive element is a diffused resistor (18) having current contacts (22, 23) at the ends and two voltage contacts (26, 27) located midway between the current contacts and on opposite sides of a current axis defined between the two current contacts. The thin silicon diaphragm (12) has a square shape and is oriented in a (100) silicon surface with its sides parallel to a (110) crystal orientation. The resistor (18) is oriented with its current axis parallel to a (100) crystalline direction and at 45 degrees with respect to the edge of the diaphragm to maximize sensitivity of the resistor to shear stresses generated by flexure of the diaphragm resulting from pressure differentials across the diaphragm. With a current flowing between current contacts (22, 23), a shear stress acting on the resistor (18) generates a voltage which appears at the voltage contacts (26, 27) and which is proportional to the magnitude of the shear stress.

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