公开(公告)号：WO0209150A3

公开(公告)日：2003-02-13

申请号：PCT/US0122573

申请日：2001-07-18

Applicant: MOTOROLA INC

Inventor： EL-ZEIN NADA ,  RAMDANI JAMAL ,  EISENBEISER KURT ,  DROOPAD RAVINDRANATH

IPC: C30B25/18 ,  H01L21/20 ,  H01L21/316 ,  H01L21/8258 ,  H01L27/06

CPC classification number: H01L21/31691 ,  C30B25/18 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02521 ,  Y10S438/90 ,  Y10S438/933

Abstract: High quality epitaxial layers of different compound semiconductor materials (237, 239) can be grown overlying regions (231, 232) of large silicon wafers (235) by first growing accommodating buffer layers (236, 238). The accommodating buffer layers is are layers of monocrystalline oxide spaced apart from the silicon wafer by amorphous interface layers (253, 234) of silicon oxide, which dissipates stain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Various circuits (242, 247) can be formed in the epitaxial layers which may be in communication with circuits (241) in the substrate. These structures have application involving communications with high frequency signals including intelligent transportation systems such as automobile radar systems, smart cruise control systems, collision avoidance systems and automotive navigations systems; and electronic payment systems that use microwave or RF signals such as electronic toll payment for various transportation systems including train fares, and toll roads, parking structures, and toll bridges automobiles.

Abstract translation: 通过首先生长容纳缓冲层（236,238），可以将不同化合物半导体材料（237,239）的高质量外延层生长成大硅晶片（235）的覆盖区域（231,232）。 容纳缓冲层是通过氧化硅的非晶界面层（253,234）与硅晶片间隔开的单晶氧化物层，其消散污渍并允许高质量单晶氧化物容纳缓冲层的生长。 可以在可以与衬底中的电路（241）连通的外延层中形成各种电路（242,247）。 这些结构具有涉及与高频信号通信的应用，包括智能交通系统，如汽车雷达系统，智能巡航控制系统，防撞系统和汽车导航系统; 以及使用微波或RF信号的电子支付系统，例如包括火车票价，收费公路，停车场和收费桥车辆在内的各种运输系统的电子费用付费。

公开(公告)号：WO0209160A3

公开(公告)日：2002-05-16

申请号：PCT/US0122747

申请日：2001-07-19

Applicant: MOTOROLA INC

Inventor： FINDER JEFFREY M ,  EISENBEISER KURT ,  RAMDANI JAMAL ,  DROOPAD RAVINDRANATH ,  OOMS WILLIAM JAY

IPC: H01L27/20 ,  H01L41/22 ,  H03H3/02 ,  H03H3/08 ,  H03H9/02 ,  H03H9/05 ,  H03H9/17

CPC classification number: H03H9/174 ,  H01L27/20 ,  H01L41/319 ,  H03H3/02 ,  H03H3/08 ,  H03H9/02574 ,  H03H9/0542

Abstract: High quality epitaxial layers (26) of piezoelectric material materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer (24) on a silicon wafer (22). The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. The piezoelectric films can be used for bulk or surface acoustic wave devices.

Abstract translation: 通过首先在硅晶片（22）上生长容纳缓冲层（24），可以将压电材料材料的高质量外延层（26）生长在大的硅晶片上。 容纳缓冲层是通过氧化硅的非晶界面层（28）与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 压电薄膜可用于体声波或声表面波器件。

公开(公告)号：WO0209187A3

公开(公告)日：2002-05-10

申请号：PCT/US0122748

申请日：2001-07-19

Applicant: MOTOROLA INC

Inventor： EL-ZEIN NADA ,  RAMDANI JAMAL ,  EISENBEISER KURT ,  DROOPAD RAVINDRANATH

IPC: H01L21/20 ,  H01L21/8258 ,  H01L27/06 ,  H01L29/88

CPC classification number: H01L29/882 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02521 ,  H01L21/8258 ,  H01L27/0605

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract translation: 通过首先在硅晶片上生长容纳缓冲层，可以将复合半导体材料的高质量外延层生长在大的硅晶片上。 容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。

公开(公告)号：WO0241378A3

公开(公告)日：2003-11-06

申请号：PCT/US0131989

申请日：2001-10-15

Applicant: MOTOROLA INC

Inventor： YU ZHIYI ,  RAMDANI JAMAL ,  DROOPAD RAVINDRANATH

IPC: C30B25/18 ,  C30B25/20 ,  H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  C30B23/02

CPC classification number: H01L21/28194 ,  C30B25/18 ,  C30B25/20 ,  H01L21/31691 ,  H01L29/513 ,  H01L29/517

Abstract: A structure and method for forming a high dielectric constant device structure includes a monocrystalline semiconductor substrate (101) and an insulating layer (103) formed of an epitaxially grown oxide such as (A)y(TixM1-x)1-yO3, wherein A is an alkaline earth metal or a combination of alkaline earth metals and M is a metallic or semi-metallic element. Semiconductor devices formed in accordance with the present invention exhibit low leakage current density.

Abstract translation: 用于形成高介电常数器件结构的结构和方法包括单晶半导体衬底（101）和由诸如（A）y（TixM1-x）1-yO3的外延生长氧化物形成的绝缘层（103），其中A 是碱土金属或碱土金属的组合，M是金属或半金属元素。 根据本发明形成的半导体器件表现出低的漏电流密度。

公开(公告)号：WO0245140A3

公开(公告)日：2003-02-06

申请号：PCT/US0132597

申请日：2001-10-18

Applicant: MOTOROLA INC

Inventor： RAMDANI JAMAL ,  HILT LYNDEE L ,  DEMKOV ALEXANDER A

IPC: H01L21/205 ,  H01L21/20 ,  H01L21/36 ,  C30B25/18

CPC classification number: H01L21/02439 ,  H01L21/0237 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02538 ,  H01L21/0254

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (24) on a silicon wafer (22). The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer (26). Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 实现顺应性衬底的形成的一种方法包括首先在硅晶片（22）上生长容纳缓冲层（24）。 容纳缓冲层是通过氧化硅的非晶界面层（28）与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层（26）晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。

公开(公告)号：WO0209157A3

公开(公告)日：2002-06-20

申请号：PCT/US0122652

申请日：2001-07-18

Applicant: MOTOROLA INC

Inventor： RAMDANI JAMAL ,  DROOPAD RAVINDRANATH ,  HILT LYNDEE

IPC: C30B25/18 ,  H01L21/20 ,  H01L21/28 ,  H01L21/316 ,  H01L29/20 ,  H01L29/78 ,  H01L29/51 ,  C30B23/02

CPC classification number: H01L29/78 ,  C30B25/18 ,  H01L21/02381 ,  H01L21/02463 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/28264 ,  H01L21/31604 ,  H01L29/20

Abstract: High quality epitaxial layers of stable oxides can be grown overlying compound semiconductor material substrates. The compound semiconductor substrate (101) may be terminated with an atomic layer of gallium, for example (for a gallium arsenide substrate), forming a terminating layer (102). The oxide layer (105) is a layer of monocrystalline alkali earth oxide spaced apart from the compound semiconductor wafer by an oxide template layer (103) overlying the compound semiconductor substrate via the terminating layer. The oxide template layer (103) dissipates strain and permits the growth of a high quality monocrystalline oxide layer. Any lattice mismatch between the monocrystalline oxide layer and the underlying compound semiconductor substrate is decreased by the oxide template layer. The monocrystalline oxide layers can be used as gate dielectric in insulated gate field effect transistors.

Abstract translation: 稳定氧化物的高质量外延层可以生长在化合物半导体材料基底上。 化合物半导体衬底（101）可以用例如（对于砷化镓衬底）的镓的原子层来终止，形成终止层（102）。 氧化物层（105）是通过覆盖化合物半导体衬底的氧化物模板层（103）经由终止层与化合物半导体晶片间隔开的单晶碱土氧化物层。 氧化物模板层（103）耗散应变并允许高质量单晶氧化物层的生长。 单晶氧化物层和下面的化合物半导体衬底之间的任何晶格失配通过氧化物模板层而降低。 单晶氧化物层可用作绝缘栅场效应晶体管中的栅极电介质。

公开(公告)号：WO0209186A3

公开(公告)日：2002-05-02

申请号：PCT/US0122677

申请日：2001-07-19

Applicant: MOTOROLA INC

Inventor： EISENBEISER KURT ,  PRENDERGAST JAMES E ,  RAMDANI JAMAL ,  MS WILLIAM JAY ,  DROOPAD RAVINDRANATH

IPC: H01L21/20 ,  H01L21/338 ,  H01L27/06

CPC classification number: H01L29/66848 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/02521 ,  H01L29/66856

Abstract: High quality epitaxial layers of compound semiconductor materials (26) can be grown overlying large silicon wafers (22) by first growing an accommodating buffer layer (24) on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer (28) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract translation: 通过首先在硅晶片上生长容纳缓冲层（24），可以将复合半导体材料（26）的高质量外延层生长成覆盖在大的硅晶片（22）上。 容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层（28）耗散应变并允许高质量单晶氧化物容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。

公开(公告)号：WO0209159A3

公开(公告)日：2002-04-25

申请号：PCT/US0122679

申请日：2001-07-19

Applicant: MOTOROLA INC

Inventor： EISENBEISER KURT ,  FINDER JEFFREY M ,  RAMDANI JAMAL ,  DROOPAD RAVINDRANATH ,  OOMS WILLIAM JAY

IPC: H01L21/20 ,  C30B23/02 ,  C30B25/02 ,  H01L21/02 ,  H01L21/316 ,  H01L39/24 ,  H01L41/22 ,  H01L41/316

CPC classification number: C30B23/02 ,  C30B25/02 ,  C30B29/32 ,  H01L21/31691 ,  H01L28/56 ,  H01L39/2458 ,  H01L41/316

Abstract: High quality epitaxial layers of metallic oxide materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract translation: 通过首先在硅晶片上生长容纳缓冲层，可以将金属氧化物材料的高质量外延层生长在大的硅晶片上。 容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。

公开(公告)号：WO0216955A2

公开(公告)日：2002-02-28

申请号：PCT/US0124559

申请日：2001-08-03

Applicant: MOTOROLA INC

Inventor： HILT LYNDEE ,  RAMDANI JAMAL

IPC: G01R33/07 ,  H01L27/22 ,  G01R33/00

CPC classification number: H01L27/22 ,  G01R33/07

Abstract: High quality epitaxial layers of compound semiconductor materials (1113) suitable for use in connection with Hall-effect devices can be grown overlying large silicon wafers (1101) by first growing an accommodating buffer layer (1110) on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (1109) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract translation: 通过首先在硅晶片上生长容纳缓冲层（1110），可以将适合用于与霍尔效应器件连接的化合物半导体材料（1113）的高质量外延层生长在大的硅晶片（1101）上。 容纳缓冲层是通过氧化硅的非晶界面层（1109）与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。

公开(公告)号：WO0159820A8

公开(公告)日：2001-11-15

申请号：PCT/US0104209

申请日：2001-02-08

Applicant: MOTOROLA INC

Inventor： RAMDANI JAMAL ,  DROOPAD RAVINDRANATH ,  HILT LYNDEE L ,  EISENBEISER KURT WILLIAM

IPC: H01L21/331 ,  C30B25/18 ,  H01L21/20 ,  H01L21/205 ,  H01L21/316 ,  H01L21/318 ,  H01L21/822 ,  H01L21/8222 ,  H01L21/8232 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8248 ,  H01L21/8249 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/04 ,  H01L27/06 ,  H01L27/092 ,  H01L27/095 ,  H01L27/14 ,  H01L27/15 ,  H01L29/26 ,  H01L29/267 ,  H01L29/732 ,  H01L33/16 ,  H01L33/30 ,  H01S5/02 ,  H01S5/026 ,  H01L21/36

CPC classification number: H01S5/0261 ,  C30B25/18 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02472 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  H01L2924/0002 ,  H01S5/021 ,  H01L2924/00

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying lattice mismatched substrates, preferably silicon wafers, by first growing an accommodating buffer layer (24). The accommodating buffer layer is a layer of monocrystalline insulator (24) spaced apart from the substrate (22) by an amorphous oxide interface layer (28) of preferably silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline insulator accommodating buffer layer (24), preferably of perovskite oxide material such as alkaline earth titenates, zirconates or the like.

Abstract translation: 通过首先生长适应缓冲层（24），可以生长高质量的化合物半导体材料的外延层，覆盖晶格失配的衬底，优选硅晶片。 适应缓冲层是通过优选氧化硅的非晶氧化物界面层（28）与衬底（22）隔开的单晶绝缘体（24）层。 无定形界面层消散应变并允许高质量单晶绝缘体适应缓冲层（24）的生长，所述缓冲层优选为钙钛矿氧化物材料，例如碱土金属钛酸盐，锆酸盐或类似物。