71.
    发明专利
    未知

    公开(公告)号:DE69325277D1

    公开(公告)日:1999-07-15

    申请号:DE69325277

    申请日:1993-12-31

    Abstract: A circuit for detecting a threshold voltage in storage devices integrated to a semiconductor, for which a power supply above a certain value is provided, is of the type which comprises a comparator (3) connected between a voltage supply line (2) and a signal ground (GND) and having a first or reference input (I1) and a second or signal input (I2), and comprises a generator (8) of a stable voltage reference (RIF) having an output connected to the first input (I1) and a divider (9) of a supply voltage (Vdd) connected to the second input (I2) of the comparator (3). A circuit means is arranged to feed the voltage line (2) with the higher of the supply voltage (Vdd) value and the value of a programming voltage (Vpp) of the storage device.

    72.
    发明专利
    未知

    公开(公告)号:DE69222249T2

    公开(公告)日:1998-04-02

    申请号:DE69222249

    申请日:1992-07-28

    Abstract: Spurious memory readings which may be caused by noise induced by transitions in the output buffers of a fast parallel memory device are prevented by permitting output latches to change state in function of newly extracted data signals by means of an enabling pulse having a preestablished duration and which is generated only after a change of memory address signals has occurred and the new configuration of memory address signals has lasted for a time which is not shorter than the time of propagation of signals through the memory chain. The enabling pulse is generated by employing a detector of transitions occurring in the input circuitry of the memory, a dummy memory chain, a one-shot pulse generator and a resetting pulse generator. The anti-noise network may be exploited also for implementing an auto-stand-by condition at the end of each read cycle, which reduces power consumption and increases speed by implifying the sensing process.

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