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    Manufacture of multi-layered electrical assemblies
    71.
    发明授权
    Manufacture of multi-layered electrical assemblies 失效
    多层电气组件的制造

    公开(公告)号：US4301580A

    公开(公告)日：1981-11-24

    申请号：US48758

    申请日：1979-06-15

    Applicant: Clarence L. Wallace

    Inventor： Clarence L. Wallace

    IPC: H01G4/008 ,  H01G4/30 ,  H05K1/03 ,  H05K1/09 ,  H05K1/16 ,  H05K3/20 ,  H05K3/40 ,  H05K3/46

    CPC classification number: H05K3/207 ,  H01G4/0085 ,  H01G4/30 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/16 ,  H05K1/162 ,  H05K2201/0284 ,  H05K2203/061 ,  H05K3/403 ,  H05K3/4092 ,  H05K3/4611 ,  H05K3/4629 ,  Y10T29/435 ,  Y10T29/4902 ,  Y10T29/49158

    Abstract: A method for fabricating electrical component assemblies includes the steps: (a) providing a first electrode and a first electrical component and locating the electrode in a recess formed by the component to produce a first laminate subassembly, (b) providing a second electrode and a second electrical component and locating the electrode in a recess formed by the second component to produce a second laminate sub-assembly, and (c) locating said two sub-assemblies in mutually stacked relation, thereby to form a resultant assembly. The components are typically provided by deposition on the electrodes and to protrude edgewise thereof beyond selected edges of the electrodes, thereby to form electrical contacts, and said locating of the sub-assemblies is carried out to cause said contacts to protrude in at least two different directions from the resultant assembly. The component typically consist of dielectric material, and the electrodes are typically deposited in the form of electrically conductive ink.

    Abstract translation: 一种用于制造电气部件组件的方法包括以下步骤：（a）提供第一电极和第一电气部件，并将电极定位在由部件形成的凹部中以产生第一层压子组件，（b）提供第二电极和 第二电气部件，并将电极定位在由第二部件形成的凹部中以产生第二层压体子组件，以及（c）将所述两个子组件以相互堆叠的关系定位，从而形成合成组件。 这些部件通常通过沉积在电极上并沿着电极的边缘突出而被提供，从而形成电触头，并且执行子组件的所述定位，以使所述触头在至少两个不同的位置突出 从最终装配的方向。 该组件通常由介电材料组成，并且电极通常以导电油墨的形式沉积。

    Method for drilling circuit boards
    73.
    发明授权
    Method for drilling circuit boards 失效
    电路板钻孔方法

    公开(公告)号：US4019826A

    公开(公告)日：1977-04-26

    申请号：US371303

    申请日：1973-06-18

    Applicant: James P. Block

    Inventor： James P. Block

    IPC: B23B35/00 ,  B23B47/28 ,  H05K3/00

    CPC classification number: H05K3/0047 ,  B23B35/005 ,  H05K2201/0284 ,  H05K2201/0293 ,  H05K2203/0152 ,  H05K2203/0214 ,  Y10T408/03 ,  Y10T408/08

    Abstract: A metal foil, of a metal such as aluminum, is held in place over the drilling entry surface of a circuit board to be drilled. The drill thus first enters the foil which acts as a shield which takes burrs, pressure foot marks and particle marks which would otherwise be imparted to the surface of the circuit board. Further, the foil provides an even surface for the drill entry which tends to minimize drill wander and resultant hole mis-alignment which could occur if initial entry were to be made at the circuit board surface which is often uneven. After drilling has been completed, the foil is removed.

    Abstract translation: 将诸如铝的金属的金属箔保持在待钻孔的电路板的钻孔入口表面上的适当位置。 因此，钻头首先进入作为屏蔽件的箔片，该箔片会产生否则会赋予电路板表面的毛刺，压脚和痕迹痕迹。 此外，箔提供用于钻入口的均匀表面，其倾向于最小化钻头漂移和由此导致的孔错误对准，如果在电路板表面上进行初始进入，这通常是不均匀的，则可能会发生这种错误。 钻孔完成后，将箔取出。

    Laminate comprising non-woven fibrous backing
    75.
    发明授权
    Laminate comprising non-woven fibrous backing 失效
    层压材料包括无纺布纤维背衬

    公开(公告)号：US3878316A

    公开(公告)日：1975-04-15

    申请号：US32421973

    申请日：1973-01-16

    Applicant: GROFF GAYLORD L

    Inventor： GROFF GAYLORD L

    IPC: D04H1/42 ,  H05K1/03 ,  H05K1/00

    CPC classification number: H05K1/0366 ,  D04H1/4342 ,  D04H1/435 ,  D04H1/4382 ,  H05K2201/0145 ,  H05K2201/0278 ,  H05K2201/0284 ,  H05K2201/0293 ,  Y10T442/692

    Abstract: The disclosed laminate is suitable for use in the art of printed circuitry and comprises an electrically conductive layer and a nonwoven backing layer. The nonwoven backing has unusual dimensional stability under a wide variety of conditions and preferably comprises a blend of at least 15 wt. % polyester staple and at least 10 wt. % aromatic polyamide staple. This blend is impregnated with a thermosettable resin.

    Abstract translation: 所公开的层压体适用于印刷电路领域，并且包括导电层和非织造背衬层。 非织造背衬在各种条件下具有不寻常的尺寸稳定性，并且优选包含至少15wt。 ％聚酯短纤维和至少10重量％ ％芳族聚酰胺短纤维。 该混合物用热固性树脂浸渍。

    Manufacture of printed circuits
    77.
    发明授权
    Manufacture of printed circuits 失效
    印刷电路的制造

    公开(公告)号：US3652332A

    公开(公告)日：1972-03-28

    申请号：US3652332D

    申请日：1970-07-06

    Applicant: AMERICAN CAN CO

    Inventor： BRAND JOHN SEEMANN ,  HONEISER VLADIMIR PAUL

    IPC: H01L49/02 ,  H05K1/09 ,  H05K1/16 ,  H05K3/12 ,  B44D1/18 ,  H01H37/36

    CPC classification number: H05K3/1208 ,  H01L49/02 ,  H05K1/0386 ,  H05K1/095 ,  H05K1/167 ,  H05K2201/0116 ,  H05K2201/0284 ,  H05K2201/0293 ,  H05K2203/0783 ,  Y10T29/49099

    Abstract: Circuits including conductors and impedance elements are printed on paper. Component values are maintained within acceptable limits of variation by correlated selection of substrate porosity and ink to produce a high degree of absorption of the liquid ink vehicle into the porous substrate while producing relatively little penetration of the pigment. Resistance values are lowered, and their reliability and consistency greatly improved, as compared with printing on either impermeable or excessively porous substrates.

    Abstract translation: 包括导体和阻抗元件的电路印在纸上。 通过相关选择基底孔隙度和油墨将组分值保持在可接受的变化范围内，以使液体油墨载体高度吸收到多孔基质中同时产生较少的颜料渗透。 与不渗透或过多孔基材上的印刷相比，电阻值降低，并且其可靠性和一致性大大提高。

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