公开(公告)号：EP0747507A1

公开(公告)日：1996-12-11

申请号：EP95932961.6

申请日：1995-10-03

Applicant: IBIDEN CO., LTD.

Inventor： YUAN, Benzhen ,  ASAI, Motoo

IPC: C23C18/52 ,  C23C18/18 ,  H05K3/18 ,  C23C18/28

CPC classification number: H05K3/244 ,  C23C18/1651 ,  C23C18/166 ,  C23C18/1834 ,  H05K3/062 ,  H05K3/108 ,  H05K3/181 ,  H05K3/184 ,  H05K2201/0344 ,  H05K2203/0392 ,  H05K2203/072

Abstract: As an electroless plating technique capable of surely promoting the plating reaction without Pd substitution reaction and fastening the plating deposition, there are proposed an electroless plating method of subjecting a primary plated film (or metal film) formed on a substrate to a secondary plating (or electroless plating), characterized in that the secondary plating is carried out after a surface potential of the primary plated film is adjusted so as to be more base than such a most base surface potential that a surface current density of the primary plated film is zero in an electroless plating solution for the secondary plating, and a pretreating solution for electroless plating containing pH adjusting agent, reducing agent and complexing agent and an electroless plating bath suitable for use in this method.

Abstract translation: 作为无电解电镀技术，能够确保促进电镀反应而不进行Pd取代反应并紧固电镀沉积，提出了一种化学镀方法，其将形成在基板上的一次镀膜（或金属膜）进行二次镀覆（或 化学镀），其特征在于，在将所述一次镀膜的表面电位调整为比所述一次镀膜的表面电流密度为零的最基本的表面电位为基准之后进行所述二次镀覆 用于二次电镀的化学镀溶液和用于含有pH调节剂，还原剂和络合剂的无电镀的预处理溶液和适用于该方法的化学镀浴。

公开(公告)号：WO2014011226A1

公开(公告)日：2014-01-16

申请号：PCT/US2013/030856

申请日：2013-03-13

Applicant: HSIO TECHNOLOGIES, LLC

Inventor： RATHBURN, James

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K1/0216 ,  H05K1/0256 ,  H05K1/0284 ,  H05K1/16 ,  H05K3/107 ,  H05K3/4664 ,  H05K3/4694 ,  H05K2201/0344 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y10T29/49155 ,  H01L2924/00014

Abstract: A high density region for a low density circuit. At least a first liquid dielectric layer is deposited on the first surface of a first circuitry layer. The dielectric layer is imaged to create plurality of first recesses. Surfaces of the first recesses are plated electro-lessly with a conductive material to form first conductive structures electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A plating resist is applied. A conductive material is electro-plated to the first conductive structure to substantially fill the first recesses, and the plating resist is removed.

Abstract translation: 低密度电路的高密度区域。 至少第一液体介电层沉积在第一电路层的第一表面上。 对电介质层进行成像以产生多个第一凹槽。 第一凹槽的表面电镀不良地与导电材料电镀以形成电耦合到第一电路层并且大致垂直于第一电路层延伸的第一导电结构。 应用电镀抗蚀剂。 将导电材料电镀到第一导电结构以基本上填充第一凹部，并且去除电镀抗蚀剂。

公开(公告)号：WO2010141295A1

公开(公告)日：2010-12-09

申请号：PCT/US2010/036282

申请日：2010-05-27

Applicant: HSIO TECHNOLOGIES, LLC ,  RATHBURN, James

Inventor： RATHBURN, James

IPC: H01L23/04

CPC classification number: H05K1/181 ,  H01L23/4985 ,  H01L2224/16 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/0221 ,  H05K1/0256 ,  H05K1/0274 ,  H05K1/0284 ,  H05K1/118 ,  H05K1/16 ,  H05K3/107 ,  H05K3/1258 ,  H05K3/207 ,  H05K3/246 ,  H05K3/28 ,  H05K3/4007 ,  H05K3/4664 ,  H05K3/4694 ,  H05K2201/0344 ,  H05K2201/0367 ,  H05K2201/09109 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y10T29/49155

Abstract: A compliant printed flexible circuit including a flexible polymeric film and at least one dielectric layer bonded to the polymeric film with recesses corresponding to a target circuit geometry. A conductive material is printed in at least a portion of the recesses to form a circuit geometry. At least one dielectric covering layer is printed over at least the circuit geometry. Openings can be printed in the dielectric covering layer to provide access to at least a portion of the circuit geometry.

Abstract translation: 一种柔性印刷柔性电路，包括柔性聚合物膜和至少一个与聚合物膜结合的介电层，其具有对应于目标电路几何形状的凹部。 在至少一部分凹部中印刷导电材料以形成电路几何形状。 至少一个电介质覆盖层至少印刷在电路几何形状上。 开口可以印刷在电介质覆盖层中以提供对电路几何形状的至少一部分的访问。

公开(公告)号：WO2010140638A1

公开(公告)日：2010-12-09

申请号：PCT/JP2010/059389

申请日：2010-06-02

Applicant: 古河電気工業株式会社 ,  藤澤 季実子 ,  大賀 賢一

Inventor： 藤澤　季実子 ,  大賀　賢一

IPC: B32B15/08 ,  C23C18/40 ,  H05K1/09

CPC classification number: B32B15/08 ,  B32B2307/3065 ,  B32B2457/00 ,  C23C18/1641 ,  C23C18/1653 ,  C23C18/2073 ,  C23C18/40 ,  H05K1/0393 ,  H05K3/181 ,  H05K2201/0129 ,  H05K2201/0344 ,  Y10T428/12569

Abstract: 基材である熱可塑性フィルムと金属層との密着性の向上、基材へのめっき皮膜の析出速度の向上、およびエッチング後の絶縁抵抗の適正化を同時に実現することが可能な金属張積層体および金属張積層体の製造方法を提供する。 熱可塑性の高分子フィルムからなる基材と、前記基材の表面に設けられた下地金属層と、前記下地金属層の表面に設けられた上部金属層と、を備えた金属張積層体であって、前記下地金属層はリンを０．０５～０．２１質量％を含有する銅合金により形成され、前記上部金属層は銅または銅合金により形成されている。

Abstract translation: 公开了一种金属层压板，其中金属层和用作基底的热塑性膜之间的粘附性得到改善，涂层在基底上的沉积速率提高，并且蚀刻后的绝缘电阻同时适当地调节 。 还公开了一种生产覆金属层压板的方法。 覆金属层压板包括由热塑性聚合物膜，设置在基底表面上的基底金属层和设置在基底金属层的表面上的上部金属层构成的基底。 基底金属层由含有0.05-0.21质量％的磷的铜合金形成，上部金属层由铜或铜合金形成。

公开(公告)号：WO2007047627A2

公开(公告)日：2007-04-26

申请号：PCT/US2006040463

申请日：2006-10-16

Applicant: GEORGIA TECH RES INST ,  BHATTACHARYA SWAPAN K ,  HORST STEPHEN ,  PAPAPOLYMEROU IOANNIS ,  TENTZERIS MANOS

Inventor： BHATTACHARYA SWAPAN K ,  HORST STEPHEN ,  PAPAPOLYMEROU IOANNIS ,  TENTZERIS MANOS

IPC: H01C10/00

CPC classification number: H01C17/18 ,  H01C7/006 ,  H01C17/06526 ,  H05K1/167 ,  H05K3/181 ,  H05K3/381 ,  H05K3/387 ,  H05K2201/0141 ,  H05K2201/0344 ,  H05K2203/095

Abstract: The present invention includes an apparatus including a thin film resistor. The thin film resistor includes a resistive component, a body, and a reactant. The resistive component includes a nickel-composite material. The body has a predetermined, sturdy shape. The body carries the resistive component. The reactant manipulates the body to enable the resistive component to adhere to the body.

Abstract translation: 本发明包括一种包括薄膜电阻器的设备。 薄膜电阻器包括电阻元件，主体和反应物。 电阻元件包括镍复合材料。 身体有一个预定的，坚固的形状。 身体携带电阻元件。 反应物操纵身体以使电阻部件粘附到身体上。

公开(公告)号：WO00055908A1

公开(公告)日：2000-09-21

申请号：PCT/US1999/028442

申请日：1999-12-01

IPC: B32B15/08 ,  B32B15/088 ,  H05K1/03 ,  H05K3/18 ,  H05K3/24 ,  H05K3/38 ,  H05K3/46 ,  H01L23/053 ,  H01L23/10 ,  H01L23/12 ,  H01L23/34

CPC classification number: H05K3/4655 ,  H01L2924/0002 ,  H05K3/181 ,  H05K3/386 ,  H05K3/387 ,  H05K3/388 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0344 ,  Y10T428/12542 ,  Y10T428/12556 ,  Y10T428/1291 ,  Y10T428/12917 ,  Y10T428/24917 ,  Y10T428/28 ,  Y10T428/31681 ,  H01L2924/00

Abstract: A laminate for use as a surface laminate in a multi-layer printed circuit board. The laminate is comprised of a film substrate (12) formed of a first polymeric material. At least one layer of a flash material (14) is applied to a first side of the film substrate. At least one layer of copper (16) is disposed on the layer of flash material. An adhesive layer (18) formed of a second polymer material has a first surface that is attached to a second side of the film substrate.

Abstract translation: 用作多层印刷电路板中的表面层压体的层压体。 层压体由由第一聚合物材料形成的薄膜基底（12）组成。 将至少一层闪光材料（14）施加到薄膜基底的第一侧。 至少一层铜（16）设置在闪光材料层上。 由第二聚合物材料形成的粘合剂层（18）具有附接到膜基材的第二侧的第一表面。

公开(公告)号：WO1996005970A1

公开(公告)日：1996-02-29

申请号：PCT/US1994009721

申请日：1994-08-25

Applicant: PARLEX CORPORATION

Inventor： PARLEX CORPORATION ,  MC KENNEY, Darryl, J. ,  CYR, Robert, D.

IPC: B44C01/22

CPC classification number: H05K3/108 ,  H05K3/426 ,  H05K2201/0344

Abstract: A method of depositing a conductive material (20) on a surface of a printed circuit board (10) includes the steps of chemically treating at least a portion of a surface of the printed circuit board, disposing a resist layer (16) over the chemically treated surface (12), depositing a conductive layer (20) in the areas which are not covered by the resist (16), stripping the resist from the surface of the printed circuit board (10), and cleaning exposed chemically treated surfaces of the printed circuit board (10) to remove contaminants from the surface of the printed circuit board (10) which were introduced in the chemically treating step.

Abstract translation: 在印刷电路板（10）的表面上沉积导电材料（20）的方法包括以下步骤：化学处理印刷电路板的表面的至少一部分，将抗蚀剂层（16）设置在化学上 处理表面（12），在未被抗蚀剂（16）覆盖的区域中沉积导电层（20），从印刷电路板（10）的表面剥离抗蚀剂，以及清洁暴露的化学处理的表面 印刷电路板（10）以从化学处理步骤中引入的印刷电路板（10）的表面去除污染物。

公开(公告)号：WO1995015674A1

公开(公告)日：1995-06-08

申请号：PCT/GB1994002651

申请日：1994-12-02

Applicant: KNOPP, John, Frederick, David

IPC: H05K03/42

CPC classification number: H05K3/428 ,  H05K2201/0344 ,  H05K2203/0565 ,  H05K2203/0723

Abstract: A method of making a plate through hole printed circuit board, comprises the steps of: a) forming conductive circuit elements (10) on two opposed faces of a paper phenolic containing substrate (11); b) coating the substrate and circuit elements with a de-sensitising material (12); c) forming holes (13) through the substrate, each hole passing through a circuit element on each of the opposed faces of the board; d) treating the board to render the substrate exposed in the holes receptive to the action of a metallic plating solution; e) removing the de-sensitising material; f) printing an acid-resist mask (14) on to both faces of the board, the mask leaving exposed only a small area of the board surrounding each hole therethrough; and g) treating the board with an electroless nickel-plating solution to deposit nickel (15) in the holes to the desired thickness to provide an electrical connection through each hole between two opposed conductive circuit elements.

Abstract translation: 一种制造板状通孔印刷电路板的方法，包括以下步骤：a）在含酚醛树脂基材（11）的两个相对的面上形成导电电路元件（10）; b）用去敏材料（12）涂覆基板和电路元件; c）通过所述基板形成孔（13），每个孔穿过所述板的每个相对面上的电路元件; d）处理板以使基板暴露于容纳金属电镀液的作用的孔中; e）去除去敏材料; f）将抗酸剂掩模（14）印刷在板的两个面上，掩模仅使围绕每个孔的板的小面积露出; 和g）用无电镀镍溶液处理该板，以将镍（15）沉积在所述孔中以达到所需厚度，从而通过两个相对的导电电路元件之间的每个孔提供电连接。

公开(公告)号：WO1993026145A1

公开(公告)日：1993-12-23

申请号：PCT/GB1993001152

申请日：1993-06-01

Applicant: KNOPP, John, Frederick, David

IPC: H05K03/42

CPC classification number: H05K3/428 ,  H05K2201/0344 ,  H05K2203/0565 ,  H05K2203/0723 ,  H05K2203/1383

Abstract: A method of making a plate through hole printed circuit board, comprises the steps of: a) forming conductive circuit elements (20) on two opposed faces of a non-conductive substrate (21); b) coating the substrate and circuit elements with a de-sensitising material (22); c) forming holes (23) through the substrate, each hole passing through a circuit element on each of the opposed faces of the board; d) treating the board to render the substrate exposed in the holes receptive to the action of a metallic plating solution; e) removing the de-sensitising material; and f) treating the board with a metallic plating solution to deposit conductive metal (24) in the holes to the desired thickness to provide an electrical connection through each hole between two opposed conductive circuit elements. This may be in two stages, with an initial thin layer of copper being deposited, followed by a main layer of nickel to the desired thickness.

Abstract translation: 一种制造板状通孔印刷电路板的方法，包括以下步骤：a）在非导电衬底（21）的两个相对面上形成导电电路元件（20）; b）用去敏材料（22）涂覆基底和电路元件; c）通过基板形成孔（23），每个孔穿过板的每个相对面上的电路元件; d）处理板以使基板暴露于容纳金属电镀液的作用的孔中; e）去除去敏材料; 以及f）用金属电镀液处理所述板，以将所述孔中的导电金属（24）沉积到所需厚度，以提供通过两个相对的导电电路元件之间的每个孔的电连接。 这可以分为两个阶段，初始薄层的铜被沉积，随后是主层的镍到所需的厚度。

公开(公告)号：US20240164012A1

公开(公告)日：2024-05-16

申请号：US18422164

申请日：2024-01-25

Applicant: NIKON CORPORATION

Inventor： Shohei KOIZUMI ,  Yoshiaki KITO ,  Seiji KAWABATA ,  Tohru KIUCHI

IPC: H05K1/02 ,  H01L29/40 ,  H01L29/49 ,  H05K1/09 ,  H05K3/06 ,  H05K3/18 ,  H05K3/24 ,  H10K10/46 ,  H10K71/60

CPC classification number: H05K1/0277 ,  H01L29/401 ,  H01L29/4908 ,  H05K1/09 ,  H05K3/064 ,  H05K3/184 ,  H05K3/244 ,  H10K10/481 ,  H10K71/60 ,  H05K2201/0344 ,  H05K2201/0347 ,  H05K2203/0271 ,  H05K2203/072 ,  H05K2203/073

Abstract: Provided is a method of manufacturing a metal wiring on a substrate, including the steps of: forming a first layer containing a first material in at least part on the substrate; forming a crack in the first layer to form the first layer having the crack; and forming a second layer containing a second material in the first layer having the crack.