公开(公告)号：US06641407B2

公开(公告)日：2003-11-04

申请号：US09955302

申请日：2001-09-19

Applicant: Yoshinori Murakami

Inventor： Yoshinori Murakami

IPC: H01R1200

CPC classification number: H05K3/368 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2924/13091 ,  H01R12/52 ,  H05K1/0216 ,  H05K1/145 ,  H05K1/148 ,  H05K1/162 ,  H05K3/36 ,  H05K2201/0792 ,  H05K2201/09672 ,  H05K2201/1028 ,  H05K2201/10818 ,  H05K2201/10893 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An interconnect structure has a plurality of planar interconnects (1, 2) mutually superposed with a prescribed distance therebetween and serving as interconnects between two circuit boards (A, B), each of the planar interconnects (1, 2) having at least two connection terminals (1A, 1B, 2A, 2B) at the circuit boards (1, 2). Rather than using rigid wire interconnects as done in the past to make interconnections, planar interconnects having relatively large surface areas are used to increase the line-to-line capacitance, thereby enhancing the filtering function that reduces high-frequency noise.

Abstract translation: 互连结构具有多个平面互连（1,2），它们之间以规定距离相互重叠并且用作两个电路板（A，B）之间的互连，每个平面互连（1,2）具有至少两个连接 电路板（1,2）上的端子（1A，1B，2A，2B）。 不像以前那样使用刚性的电线互连来做互连，而是使用具有相对大的表面积的平面互连来增加线对线电容，从而增强降低高频噪声的滤波功能。

公开(公告)号：US20020037656A1

公开(公告)日：2002-03-28

申请号：US09955302

申请日：2001-09-19

Inventor： Yoshinori Murakami

IPC: H05K001/00

CPC classification number: H05K3/368 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2924/13091 ,  H01R12/52 ,  H05K1/0216 ,  H05K1/145 ,  H05K1/148 ,  H05K1/162 ,  H05K3/36 ,  H05K2201/0792 ,  H05K2201/09672 ,  H05K2201/1028 ,  H05K2201/10818 ,  H05K2201/10893 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An interconnect structure has a plurality of planar interconnects (1, 2) mutually superposed with a prescribed distance therebetween and serving as interconnects between two circuit boards (A, B), each of the planar interconnects (1, 2) having at least two connection terminals (1A, 1B, 2A, 2B) at the circuit boards (1, 2). Rather than using rigid wire interconnects as done in the past to make interconnections, planar interconnects having relatively large surface areas are used to increase the line-to-line capacitance, thereby enhancing the filtering function that reduces high-frequency noise.

Abstract translation: 互连结构具有多个平面互连（1,2），它们之间以规定距离相互重叠并且用作两个电路板（A，B）之间的互连，每个平面互连（1,2）具有至少两个连接 电路板（1,2）上的端子（1A，1B，2A，2B）。 不像以前那样使用刚性的电线互连来做互连，而是使用具有相对大的表面积的平面互连来增加线对线电容，从而增强降低高频噪声的滤波功能。

公开(公告)号：US6137064A

公开(公告)日：2000-10-24

申请号：US359849

申请日：1999-07-23

Applicant: Sepehr Kiani ,  R. Ryan Vallance

Inventor： Sepehr Kiani ,  R. Ryan Vallance

IPC: H01R12/51 ,  H05K1/02 ,  H05K1/11 ,  H05K3/04 ,  H05K3/30 ,  H05K3/34 ,  H05K3/40 ,  H05K3/42 ,  H01R12/04

CPC classification number: H05K1/0222 ,  H05K1/112 ,  H05K1/115 ,  H05K3/403 ,  H01R12/523 ,  H05K2201/09645 ,  H05K2201/1059 ,  H05K2201/10856 ,  H05K2201/10893 ,  H05K2201/10969 ,  H05K2203/0455 ,  H05K3/043 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/429

Abstract: An interconnection circuit includes a plated through hole having a plurality of electrically isolated segments with at least one of the plurality of electrically isolated segments coupled to a signal path and at least one of the electrically isolated segments coupled to ground. With this arrangement, the circuit provides a signal path between a first and a second different layers of a multilayer. By providing one segment as a signal segment and another segment as a ground segment the size and shape of the electrically isolated segments can be selected to provide the interconnection circuit having a predetermined impedance characteristic. The interconnection circuit can thus be impedance matched to circuit board circuits, devices and transmission lines, such as striplines, microstrips and co-planar waveguides. This results in an interconnection circuit which maintains the integrity of relatively high-frequency signals propagating through the interconnection circuit from the first layer to the second layer. The interconnect circuits can be formed by creating distinct conductor paths within the cylindrical plated through-holes using variety of manufacturing techniques including, but not limited to, broaching techniques, electrical discharge milling (EDM) techniques and laser etching techniques.

Abstract translation: 互连电路包括具有多个电隔离段的电镀通孔，其中所述多个电隔离段中的至少一个耦合到信号路径和耦合到地的电隔离段中的至少一个。 利用这种布置，电路提供了多层的第一和第二不同层之间的信号路径。 通过将一个段作为信号段，另一个段作为接地段，可以选择电隔离段的大小和形状，以提供具有预定阻抗特性的互连电路。 因此，互连电路可以与电路板电路，器件和传输线（例如带状线，微带和共面波导）阻抗匹配。 这导致互连电路，其维持通过互连电路从第一层传播到第二层的相对高频信号的完整性。 可以通过使用各种制造技术（包括但不限于拉削技术，放电铣削（EDM）技术和激光蚀刻技术）在圆柱形电镀通孔内产生不同的导体路径来形成互连电路。

公开(公告)号：US5975913A

公开(公告)日：1999-11-02

申请号：US50889

申请日：1998-03-31

Applicant: Shigehito Wada ,  Hisashi Saitou ,  Kazutoshi Morishima

Inventor： Shigehito Wada ,  Hisashi Saitou ,  Kazutoshi Morishima

IPC: H05K3/46 ,  H01R9/28 ,  H04Q1/14 ,  H05K1/00 ,  H05K1/11 ,  H05K3/40 ,  H01R29/00

CPC classification number: H04Q1/145 ,  H01R9/28 ,  H04Q1/147 ,  H05K3/4046 ,  H05K1/0286 ,  H05K2201/09645 ,  H05K2201/10893

Abstract: The interconnection board includes a plurality of non-conductive insulation layers and through-holes running through the insulation layers. A plurality of conductive patterns are provided on each insulation layer, electrically insulated from each other, and exposed to the inside of one through-hole at the same axial position of the through-hole. The connection pin has a non-conductive stem and a connection pattern provided on the non-conductive stem. The connection pattern extends in the axial direction of the connection pin and electrically connects two conductive patterns provided on different insulation layers at the same circumferential position in the through-hole, by bringing the conductive patterns into contact at positions which are axially different and circumferentially the same.

Abstract translation: 互连板包括穿过绝缘层的多个非导电绝缘层和通孔。 多个导电图案设置在每个绝缘层上，彼此电绝缘，并且在通孔的相同轴向位置处暴露于一个通孔的内部。 连接销具有非导电杆和设置在非导电杆上的连接图案。 连接图案沿着连接销的轴向方向延伸，并且通过使导电图案在轴向不同并沿周向的位置接触地电连接设置在通孔中相同圆周位置处的不同绝缘层上的两个导电图案 相同。

公开(公告)号：US5825633A

公开(公告)日：1998-10-20

申请号：US740940

申请日：1996-11-05

Applicant: C. Gregory Bujalski ,  Jeffrey M. Petsinger ,  Daniel T. Rooney

Inventor： C. Gregory Bujalski ,  Jeffrey M. Petsinger ,  Daniel T. Rooney

IPC: H05K3/34 ,  H05K3/36 ,  H05K1/11

CPC classification number: H05K3/368 ,  H01R12/523 ,  H05K2201/09063 ,  H05K2201/10893 ,  H05K3/3442

Abstract: A multi-board electronic assembly (10) includes a first substrate (12) and a second substrate (14) electrically connected by a spacer (16). The spacer (16) includes a first end (26) that is received in a first receptacle (18) on the first substrate (12) and a second end (28) that is received in a second receptacle (22) in the second substrate (14). The spacer (16) is formed generally of a nonconductive body (15) and includes ridges (60) and longitudinal channels (30) defined between the ridges (60). The ridges (60) are formed generally of a nonconductive material, and the spacer (16) includes a metallic strip (32) disposed within the channel (30). The metallic strip (32) forms a conductive path to connect the first circuit trace (20) to the second circuit trace (24) to form an electrically connected microelectronic assembly (10).

Abstract translation: 多板电子组件（10）包括通过间隔件（16）电连接的第一基板（12）和第二基板（14）。 间隔件（16）包括容纳在第一基板（12）上的第一容器（18）中的第一端（26）和容纳在第二基板（22）中的第二容器（22）中的第二端 （14）。 间隔物（16）通常由非导电体（15）形成，并且包括限定在脊（60）之间的脊（60）和纵向通道（30）。 脊（60）通常由非导电材料形成，并且间隔件（16）包括设置在通道（30）内的金属条（32）。 金属条（32）形成导电路径以将第一电路迹线（20）连接到第二电路迹线（24）以形成电连接的微电子组件（10）。

公开(公告)号：US5659953A

公开(公告)日：1997-08-26

申请号：US464384

申请日：1995-06-05

Applicant: Stanford W. Crane, Jr. ,  Maria M. Portuondo

Inventor： Stanford W. Crane, Jr. ,  Maria M. Portuondo

IPC: H05K1/18 ,  H01L23/498 ,  H05K1/11 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/46 ,  H01R9/00 ,  H05K3/00

CPC classification number: H01L23/49861 ,  H01L23/49811 ,  H05K1/112 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/4623 ,  H01L2924/0002 ,  H05K2201/09472 ,  H05K2201/09536 ,  H05K2201/09645 ,  H05K2201/10189 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10772 ,  H05K2201/10893 ,  H05K3/321 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: An apparatus comprising a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and a device having at least one electrically conductive lead or wire extending into the well and being in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate. Also, a method of manufacturing an apparatus comprising the steps of forming a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and extending at least one electrically conductive lead or wire from a device into the well such that the lead or wire is in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate.

Abstract translation: 一种包括多层衬底的装置，所述多层衬底包括多层绝缘材料，至少一个阱形成在至少一层中，所述阱从所述多层衬底的外表面延伸到所述多层衬底的内表面 以及在所述多层基板的内表面上的所述阱内形成的导电部件; 以及具有延伸到阱中的至少一个导电引线或导线并与形成在多层基板的内表面上的导电部件直接物理接触的器件。 另外，制造装置的方法包括以下步骤：形成包括多层绝缘材料的多层基板，至少一层形成在至少一层中的阱，所述阱从所述多层的外表面延伸 在多层基板的内表面上形成有在多层基板的内表面上的导电部件， 并且将至少一个导电引线或线从器件延伸到阱中，使得引线或引线与形成在多层衬底的内表面上的导电部件直接物理接触。

公开(公告)号：US5543586A

公开(公告)日：1996-08-06

申请号：US208519

申请日：1994-03-11

Applicant: Stanford W. Crane, Jr. ,  Maria M. Portuondo

Inventor： Stanford W. Crane, Jr. ,  Maria M. Portuondo

IPC: H05K1/18 ,  H01L23/498 ,  H05K1/11 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/46 ,  H05K1/02

CPC classification number: H01L23/49861 ,  H01L23/49811 ,  H05K1/112 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/4623 ,  H01L2924/0002 ,  H05K2201/09472 ,  H05K2201/09536 ,  H05K2201/09645 ,  H05K2201/10189 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10772 ,  H05K2201/10893 ,  H05K3/321 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: An apparatus comprising a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and a device having at least one electrically conductive lead or wire extending into the well and being in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate. Also, a method of manufacturing an apparatus comprising the steps of forming a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and extending at least one electrically conductive lead or wire from a device into the well such that the lead or wire is in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate.

Abstract translation: 一种包括多层衬底的装置，所述多层衬底包括多层绝缘材料，至少一个阱形成在至少一层中，所述阱从所述多层衬底的外表面延伸到所述多层衬底的内表面 以及形成在多层基板的内表面上的阱内的导电部件; 以及具有延伸到阱中的至少一个导电引线或导线并与形成在多层基板的内表面上的导电部件直接物理接触的器件。 另外，制造装置的方法包括以下步骤：形成包括多层绝缘材料的多层基板，至少一层形成在至少一层中的阱，所述阱从多层的外表面延伸 在多层基板的内表面上形成有在多层基板的内表面上的导电部件， 并且将至少一个导电引线或线从器件延伸到阱中，使得引线或引线与形成在多层衬底的内表面上的导电部件直接物理接触。

公开(公告)号：US5133669A

公开(公告)日：1992-07-28

申请号：US555600

申请日：1990-07-23

Applicant: Robert L. Barnhouse ,  H. Scott Estes

Inventor： Robert L. Barnhouse ,  H. Scott Estes

IPC: H01R12/71 ,  H05K3/00 ,  H05K3/04 ,  H05K3/06 ,  H05K3/10 ,  H05K3/30 ,  H05K3/40 ,  H05K3/42

CPC classification number: H01R12/526 ,  H01R12/58 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09645 ,  H05K2201/10295 ,  H05K2201/10893 ,  H05K2203/0557 ,  H05K3/0047 ,  H05K3/043 ,  H05K3/061 ,  H05K3/108 ,  H05K3/308 ,  H05K3/427 ,  Y10S439/931 ,  Y10T29/49204

Abstract: A printed circuit board pin having a dielectric body and two or more conductor lines extending along the body, the conductor lines insulated from one another. In one construction, the body is planar with a planar conductor line on each of two opposite sides of the pin. This pin may be made by stamping from a laminate sheet of the dielectric material sandwiched between layers of conductor material. Three or more conductors upon a pin may be formed by plating techniques or possibly by extrusion.

Abstract translation: 一种印刷电路板销，其具有绝缘体和沿着本体延伸的两条或更多条导体线，导线彼此绝缘。 在一种构造中，主体在销的两个相对侧中的每一侧上具有平面的导体线。 该引脚可以由夹在导体材料层之间的介电材料的层叠片冲压制成。 可以通过电镀技术或可能通过挤出形成销上的三个或更多个导体。

公开(公告)号：EP2865052A1

公开(公告)日：2015-04-29

申请号：EP13806722.8

申请日：2013-06-19

Applicant: Lexmark International, Inc.

Inventor： HARDIN, Keith, Bryan ,  HALL, Paul, Kevin ,  KRATZER, Zachary, Charles, Nathan ,  ZHANG, Qing ,  FESSLER, John, Thomas

IPC: H01R12/58

CPC classification number: H05K3/301 ,  H05K1/0222 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0251 ,  H05K1/0298 ,  H05K1/184 ,  H05K3/306 ,  H05K3/4046 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/10015 ,  H05K2201/10893 ,  H05K2201/10984 ,  Y10T29/4913 ,  Y10T29/49135

Abstract: A Z-directed component for mounting in a mounting hole in a printed circuit board according to one example embodiment includes a main body portion and a tapered end portion that facilitates insertion of the Z-directed component into the mounting hole in the printed circuit board. The tapered end portion is removably attached to the main body portion such that the tapered end portion may be removed after the Z-directed component is inserted into the mounting hole in the printed circuit board. A method for installing a Z-directed component having a removable tapered lead-in into the mounting hole according to one example embodiment includes inserting the Z- directed component into the mounting hole in the printed circuit board with the removable tapered lead-in leading the insertion and after the Z-directed component is inserted into the mounting hole, removing the removable lead-in from the rest of the Z-directed component.

Abstract translation: 根据一个示例性实施例的用于安装在印刷电路板的安装孔中的Z指向部件包括主体部分和锥形端部，其有助于将Z定向部件插入到印刷电路板中的安装孔中。 锥形端部可移除地附接到主体部分，使得在Z指向部件插入印刷电路板的安装孔中之后，锥形端部可以被移除。 根据一个示例性实施例的用于将具有可移除的锥形引入件的Z指向部件安装到安装孔中的方法包括将Z定向部件插入印刷电路板中的安装孔中，其中可移除的锥形引入引导 插入，并且在将Z定向部件插入到安装孔中之后，从Z定向部件的其余部分移除可移除引入线。

公开(公告)号：EP1855512A1

公开(公告)日：2007-11-14

申请号：EP07105046.2

申请日：2007-03-27

Applicant: Siemens AG Österreich

Inventor： Petricek, Martin

IPC: H05K1/14 ,  H05K3/36 ,  H01R12/04

CPC classification number: H01R12/515 ,  H01R12/57 ,  H05K3/325 ,  H05K2201/10409 ,  H05K2201/10651 ,  H05K2201/10893 ,  H05K2203/167

Abstract: Die Erfindung betrifft eine Anordnung einer Leiterplatte (1) und einem dazu in einem festen Abstand gehaltenen Kontaktträger, bei welcher eine dem Kontaktträger zugewandte Anschlussfläche (4) der Leiterplatte (1) mit einem an dem Kontaktträger ausgebildeten Gegenkontakt mittels einer Kontaktbrücke (2) elektrisch leitend verbunden ist, wobei die Kontaktbrücke (2) als Kunststoffteil (6) mit wenigstens einem von diesem Kunststoffteil (6) gehaltenen Drahtelement (5a, 5b) ausgebildet ist und wobei ein Ende des wenigstens einen Drahtelements (5a, 5b) auf einer Stirnfläche des Kunststoffteils (6) aufliegt und wobei des Weiteren der Kunststoffteil (6) mit der Leiterplatte (1) in der Weise mittels einer Verschraubung verbunden ist, dass das Ende des wenigstens einen Drahtelements (5a, 5b) zwischen Stirnfläche des Kunststoffteils (6) und Anschlussfläche (4) der Leiterplatte (1) geklemmt ist.

Abstract translation: 该装置具有一个接触桥（2）设计为塑料部件（6）包括线单元（5A，5B），其中在单元的导线的一端位于所述塑料部的前表面上。 塑料部件通过使用检查的螺纹连接与印刷电路板（1），其连接做了线单元的端部的塑料部件的前表面和所述印刷电路板的连接面之间。