公开(公告)号：US08685777B2

公开(公告)日：2014-04-01

申请号：US13176371

申请日：2011-07-05

Applicant: Christel Dieppedale ,  Stephan Borel ,  Bruno Reig ,  Henri Sibuet

Inventor： Christel Dieppedale ,  Stephan Borel ,  Bruno Reig ,  Henri Sibuet

IPC: H01L21/02 ,  B81C1/00 ,  H01H1/00

CPC classification number: B81C1/00158 ,  B81B2201/018 ,  B81B2201/0264 ,  B81B2203/0118 ,  B81B2203/0361 ,  B81C1/00492 ,  B81C2201/0178 ,  H01H1/0036

Abstract: The fabrication of a semiconductor fixed structure defining a volume, for example of a MEMS micro electro-mechanical system includes, determining thicknesses beforehand depending on the functional distances associated with elements. At least one element is formed on a substrate by thermal oxidation of the substrate so as to form an oxide layer followed by selective etching of the oxide layer so as to define the volume in an etched portion by baring the underlying substrate so as to define the element in an unetched portion, and later oxidation of the substrate so as to form an oxide layer, in order to obtain the elements at the functional distances.

Abstract translation: 限定体积的半导体固定结构（例如MEMS微机电系统）的制造包括：根据与元件相关联的功能距离预先确定厚度。 通过衬底的热氧化在衬底上形成至少一个元件，以便形成氧化物层，然后选择性地蚀刻氧化物层，以便通过掩埋下面的衬底限定蚀刻部分中的体积，从而限定 元素在未蚀刻部分中，并且随后氧化基底以形成氧化物层，以便在功能距离处获得元件。

公开(公告)号：US20130221495A1

公开(公告)日：2013-08-29

申请号：US13721496

申请日：2012-12-20

Applicant: The Hong Kong University of Science and Technology

Inventor： Man WONG ,  Fan ZENG

IPC: H01L21/461 ,  H01L29/16

CPC classification number: H01L21/461 ,  B01J19/0093 ,  B01J2219/00783 ,  B01J2219/00822 ,  B01J2219/00828 ,  B01J2219/00837 ,  B01J2219/0086 ,  B01L3/502707 ,  B01L2300/0816 ,  B81B2201/058 ,  B81B2203/0338 ,  B81C1/00071 ,  B81C2201/0116 ,  B81C2201/0178 ,  H01L29/16

Abstract: Described herein is a microchannel that is formed beneath and parallel to a surface of a silicon substrate. Silicon migration technology is utilized to form a microchannel that is buried beneath the surface of the silicon substrate. Etching opens at least one end of the microchannel. Oxidization is utilized through the open end of the microchannel to facilitate a controlled diameter of the microchannel.

Abstract translation: 这里描述的是形成在硅衬底的表面下方并平行于其的表面的微通道。 利用硅迁移技术形成埋在硅衬底表面下方的微通道。 蚀刻打开微通道的至少一端。 通过微通道的开口端利用氧化，以促进微通道的受控直径。

公开(公告)号：US07435991B2

公开(公告)日：2008-10-14

申请号：US10588838

申请日：2004-12-20

Applicant: Hans-Peter Baer ,  Arnim Hoechst

Inventor： Hans-Peter Baer ,  Arnim Hoechst

IPC: H01L23/58

CPC classification number: B81C1/00182 ,  B81B2201/0292 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C2201/0178

Abstract: A micromechanical sensor and a method for manufacturing same are described. A secure diaphragm restraint, independent of fluctuations in the cavern etching process due to the process technology, and a free design of the diaphragm are made possible by designing a suitable connection of the diaphragm in an oxide layer created by local oxidation. The micromechanical sensor includes, for example, a substrate, an external oxide layer formed in a laterally external area in the substrate, a diaphragm having multiple perforation holes formed in a laterally internal diaphragm area, a cavern etched in the substrate beneath the diaphragm, whereby the diaphragm is suspended in a suspension area of the external oxide layer which tapers toward connecting points of the diaphragm and the diaphragm is situated in its vertical height between a top side and a bottom side of the external oxide layer.

Abstract translation: 描述了一种微机械传感器及其制造方法。 通过设计通过局部氧化产生的氧化物层中的隔膜的适当连接，可以实现由于工艺技术而独立于洞穴蚀刻工艺的波动和隔膜的自由设计的安全膜片约束。 微机械传感器包括例如基板，形成在基板的横向外部区域中的外部氧化物层，具有形成在横向内部隔膜区域中的多个穿孔的隔膜，在隔膜下方的基板中蚀刻的基底，由此 隔膜悬挂在外部氧化物层的悬垂区域中，该外部氧化物层朝向隔膜的连接点逐渐变细，并且隔膜位于外部氧化物层的顶侧和底侧之间的垂直高度。

公开(公告)号：US07419581B2

公开(公告)日：2008-09-02

申请号：US10474968

申请日：2002-03-05

Applicant: Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Frank Schaefer

Inventor： Hubert Benzel ,  Heribert Weber ,  Hans Artmann ,  Frank Schaefer

IPC: B81B1/00 ,  H01L31/028 ,  H01L31/18

CPC classification number: B81B3/0083 ,  B81B2203/0315 ,  B81C2201/0114 ,  B81C2201/0115 ,  B81C2201/0178 ,  C25F3/12 ,  C25F3/14 ,  H01L21/306 ,  H01L21/3081

Abstract: A simple and cost-effective possibility is proposed for producing optically transparent regions (5, 6) in a silicon substrate (1), by the use of which both optically transparent regions of any thickness and optically transparent regions over a cavity in a silicon substrate are able to be implemented.For this purpose, first at least a specified region (5, 6) of the silicon substrate (1) is etched porous. Thereafter, the specified porous region (5, 6) of the silicon substrate (1) is oxidized.

Abstract translation: 提出了在硅衬底（1）中制造光学透明区域（5,6）的简单和成本有效的可能性，其中通过在硅衬底的空腔上使用任何厚度和光学透明区域的两个光学透明区域 能够实施。 为此目的，首先对硅衬底（1）的至少一个特定区域（5,6）进行多孔蚀刻。 此后，硅衬底（1）的规定的多孔区域（5,6）被氧化。

公开(公告)号：US20070138581A1

公开(公告)日：2007-06-21

申请号：US10588838

申请日：2004-12-20

Applicant: Hans-Peter Baer ,  Araim Hoechst

Inventor： Hans-Peter Baer ,  Araim Hoechst

IPC: H01L29/82

CPC classification number: B81C1/00182 ,  B81B2201/0292 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C2201/0178

Abstract: A micromechanical sensor and a method for manufacturing same are described. A secure diaphragm restraint, independent of fluctuations in the cavern etching process due to the process technology, and a free design of the diaphragm are made possible by designing a suitable connection of the diaphragm in an oxide layer created by local oxidation. The micromechanical sensor includes, for example, a substrate, an external oxide layer formed in a laterally external area in the substrate, a diaphragm having multiple perforation holes formed in a laterally internal diaphragm area, a cavern etched in the substrate beneath the diaphragm, whereby the diaphragm is suspended in a suspension area of the external oxide layer which tapers toward connecting points of the diaphragm and the diaphragm is situated in its vertical height between a top side and a bottom side of the external oxide layer.

Abstract translation: 描述了一种微机械传感器及其制造方法。 通过设计通过局部氧化产生的氧化物层中的隔膜的适当连接，可以实现由于工艺技术而独立于洞穴蚀刻工艺的波动和隔膜的自由设计的安全膜片约束。 微机械传感器包括例如基板，形成在基板的横向外部区域中的外部氧化物层，具有形成在横向内部隔膜区域中的多个穿孔的隔膜，在隔膜下方的基板中蚀刻的基底，由此 隔膜悬挂在外部氧化物层的悬垂区域中，该外部氧化物层朝向隔膜的连接点逐渐变细，并且隔膜位于外部氧化物层的顶侧和底侧之间的垂直高度。

公开(公告)号：US07079299B1

公开(公告)日：2006-07-18

申请号：US09584835

申请日：2000-05-31

Applicant: Robert A. Conant ,  Jocelyn T. Nee ,  Kam-Yin Lau ,  Richard S. Muller

Inventor： Robert A. Conant ,  Jocelyn T. Nee ,  Kam-Yin Lau ,  Richard S. Muller

IPC: G02B26/08

CPC classification number: B81C1/00182 ,  B81B2201/042 ,  B81B2203/0136 ,  B81C2201/0178 ,  B81C2203/032 ,  G02B26/0841

Abstract: A staggered torsional electrostatic combdrive includes a stationary combteeth assembly and a moving combteeth assembly with a mirror and a torsional hinge. The moving combteeth assembly is positioned entirely above the stationary combteeth assembly by a predetermined vertical displacement during a combdrive state. A method of fabricating the staggered torsional electrostatic combdrive includes the step of deep trench etching a stationary combteeth assembly in a first wafer. A second wafer is bonded to the first wafer to form a sandwich including the first wafer, an oxide layer, and the second wafer. A moving combteeth assembly is formed in the second wafer. The moving combteeth assembly includes a mirror and a torsional hinge. The moving combteeth assembly is separated from the first wafer by the oxide layer. The oxide layer is subsequently removed to release the staggered torsional electrostatic combdrive.

Abstract translation: 交错的扭转静电梳状驱动器包括固定的组合组件和具有反射镜和扭转铰链的移动梳状组件。 在梳状驱动状态期间，运动的组合组件完全位于固定的组合组件上方预定的垂直位移。 制造交错扭转静电梳齿驱动器的方法包括在第一晶片中深沟槽蚀刻静止梳组件的步骤。 第二晶片结合到第一晶片以形成包括第一晶片，氧化物层和第二晶片的夹层。 在第二晶片中形成移动的组合组件。 移动的组合组件包括反射镜和扭转铰链。 移动的组合组件通过氧化物层与第一晶片分离。 随后去除氧化物层以释放交错的扭转静电梳状驱动。

公开(公告)号：US06900071B2

公开(公告)日：2005-05-31

申请号：US10381046

申请日：2001-07-26

Applicant: Mika Okumura ,  Makio Horikawa ,  Kiyoshi Ishibashi

Inventor： Mika Okumura ,  Makio Horikawa ,  Kiyoshi Ishibashi

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L21/316 ,  H01L29/84 ,  H01L21/00

CPC classification number: H01L21/02255 ,  B81B2201/0235 ,  B81B2203/0307 ,  B81B2207/07 ,  B81C1/00365 ,  B81C2201/0178 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02238 ,  H01L21/02271 ,  H01L21/31612 ,  H01L21/31662

Abstract: A substrate is provided with a substrate main body made from silicon, and an oxide film for a base formed thereon. The oxide film includes a first oxide film made mainly of a thermal SiO2 film formed by thermally oxidizing silicon in the substrate main body, and a second oxide film made of a high-temperature oxide film deposited and formed thereon. Alternatively the second oxide film may be formed by TEOS.

Abstract translation: 基板设置有由硅制成的基板主体和形成在其上的基板用氧化膜。 氧化膜包括主要由通过热氧化衬底主体中的硅而形成的热SiO 2膜的第一氧化物膜和由沉积并形成的高温氧化膜制成的第二氧化物膜 上。 或者，第二氧化物膜可以由TEOS形成。

公开(公告)号：US06627096B2

公开(公告)日：2003-09-30

申请号：US09847798

申请日：2001-05-02

Applicant: David W. Sherrer ,  Gregory A. Ten Eyck ,  Dan A. Steinberg ,  Neal Ricks

Inventor： David W. Sherrer ,  Gregory A. Ten Eyck ,  Dan A. Steinberg ,  Neal Ricks

IPC: H01L2100

CPC classification number: B81C1/00126 ,  B81B2203/0384 ,  B81C1/00428 ,  B81C2201/0132 ,  B81C2201/014 ,  B81C2201/0178 ,  G02B6/3636 ,  G02B6/3652 ,  G02B6/3692 ,  G02B6/423 ,  G02B2006/12176

Abstract: Methods for making a micromachined device (e.g. an microoptical submount) having positive features (extending up from a device surface) and negative features (extending into the device surface). The present techniques locate the postive feature and negative features according to a single mask step. In one embodiment, a hard mask is patterned on top of the device layer of an SOI wafer. Then, RIE is used to vertically etch to the etch stop layer, forming the positive feature. Then, the positive feature is masked, and metal or hard mask is deposited on the exposed areas of the etch stop layer. Then, portions of the device layer are removed, leaving the patterned metal layer on the etch stop layer. Then, the etch stop layer is removed in an exposed area, uncovering the handle layer. Then, the handle layer is etched in an exposed area to form the negative feature.

Abstract translation: 用于制造具有正特征（从器件表面向上延伸）和负特征（延伸到器件表面）的微加工器件（例如，微光学基座）的方法。 本技术根据单个掩模步骤定位了后置特征和负特征。 在一个实施例中，在SOI晶片的器件层的顶部上形成硬掩模。 然后，RIE用于垂直蚀刻到蚀刻停止层，形成阳性特征。 然后，正面特征被掩蔽，并且金属或硬掩模沉积在蚀刻停止层的暴露区域上。 然后，去除器件层的部分，留下图案化的金属层在蚀刻停止层上。 然后，在曝光区域中去除蚀刻停止层，露出手柄层。 然后，在曝光区域中蚀刻手柄层以形成负面特征。

公开(公告)号：US06569702B2

公开(公告)日：2003-05-27

申请号：US09885832

申请日：2001-06-19

Applicant: Dong-il Cho ,  Sangwoo Lee ,  Sangjun Park

Inventor： Dong-il Cho ,  Sangwoo Lee ,  Sangjun Park

IPC: H01L2100

CPC classification number: B81C1/0019 ,  B81C2201/0178 ,  H01L21/764

Abstract: An isolation method for a single crystalline silicon microstructure using a triple layer structure is disclosed. The method includes forming the triple layer composed of an insulation layer formed over an exposed surface of the silicon microstructure, a conductive layer formed over the entire insulation layer, and a metal layer formed over a top portion of the microstructure; and partially etching the conductive layer to form electrical isolation between parts of the microstructure. The method does not require a separate photolithography process for isolation, and can be effectively applied to microstructures having high aspect ratios and narrow trenches. Also disclosed are single crystalline silicon microstructures having a triple layer isolation structure formed using the disclosed method.

公开(公告)号：US20020001871A1

公开(公告)日：2002-01-03

申请号：US09885832

申请日：2001-06-19

Applicant: Chromux Technologies, Inc.

Inventor： Dong-Il Cho ,  Sangwoo Lee ,  Sangjun Park

IPC: H01L021/00 ,  H01L021/76

CPC classification number: B81C1/0019 ,  B81C2201/0178 ,  H01L21/764

Abstract: An isolation method for a single crystalline silicon microstructure using a triple layer structure is disclosed. The method includes forming the triple layer composed of an insulation layer formed over an exposed surface of the silicon microstructure, a conductive layer formed over the entire insulation layer, and a metal layer formed over a top portion of the microstructure; and partially etching the conductive layer to form electrical isolation between parts of the microstructure. The method does not require a separate photolithography process for isolation, and can be effectively applied to microstructures having high aspect ratios and narrow trenches. Also disclosed are single crystalline silicon microstructures having a triple layer isolation structure formed using the disclosed method.

Abstract translation: 公开了使用三层结构的单晶硅微结构的隔离方法。 该方法包括形成由在硅微结构的暴露表面上形成的绝缘层，形成在整个绝缘层上的导电层和形成在微结构的顶部上的金属层构成的三层; 并部分地蚀刻导电层以在微结构的各部分之间形成电隔离。 该方法不需要用于隔离的单独的光刻工艺，并且可以有效地应用于具有高纵横比和窄沟槽的微结构。 还公开了具有使用所公开的方法形成的三层隔离结构的单晶硅微结构。