Abstract:
PURPOSE: A charge storage layer, a forming method thereof, a nonvolatile memory device thereof, and a manufacturing method thereof are provided to easily control the density and size of the charge storage layer of a nonvolatile memory device. CONSTITUTION: A tunneling oxide film(11) is formed on the semiconductor substrate. The charge storage layer is discontinuously formed on the tunneling oxide film and includes at least two dissimilar metal nano crystals. A control oxide film(13) is formed on the metal nano crystal of the charge storage layer and the tunneling oxide film. A control gate(14) is formed on the control oxide film.
Abstract:
본 발명은 밀도 및 크기를 용이하게 조절할 수 있는 나노 크기의 나노 크리스탈을 고온의 열처리 공정 없이 마이셀을 이용하여 합성하여, 비휘발성 메모리 장치의 플로팅 게이트로 사용할 수 있도록 하는 플로팅 게이트 형성 방법, 이를 이용한 비휘발성 메모리 장치 및 그 제조 방에 관한 것이다. 이러한, 본 발명은 반도체 기판 상에 플로팅 게이트를 형성하는 방법은, 반도체 기판 상에 터널링 산화막을 형성하는 단계와, 상기 터널링 산화막 상에 자기 조립 방식으로 형성되는 나노 구조에 금속염을 합성할 수 있는 선구 물질이 도입된 마이셀 템플릿을 포함하는 게이트 형성 용액을 코팅하는 단계와, 상기 반도체 기판 상의 상기 마이셀 템플릿을 제거하여 상기 터널링 산화막 상에 상기 금속염을 배열시켜 상기 플로팅 게이트를 형성하는 단계를 포함한다. 비휘발성 메모리, 플로팅 게이트, 마이셀 중합체, 나노 크리스탈, 자기 조립
Abstract:
Provided is a charge trapping layer which has excellent memory characteristics, a method of forming the charge trapping layer, a nonvolatile memory device using the charge trapping layer, and a method of fabricating the nonvolatile memory device, in which a hybrid nanoparticle which is obtained by mixing a nanoparticle having an excellent programming characteristic with a nanoparticle having an excellent erasing characteristic is used as the charge trapping layer. The charge trapping layer for use in the nanoparticle is discontinuously formed between a tunneling oxide film and a control oxide film, and includes at least two different kinds of numerous nanoparticles.
Abstract:
A method for forming a floating gate, a non-volatile memory device, and a manufacturing thereof are provided to prevent a property change of layer quality due to a high-temperature heat treatment process by forming a nano crystal with a micell. A tunneling oxide layer(11) is formed on an upper surface of a semiconductor substrate(10). A nano structure is formed on the tunneling oxide layer by using a self-assembly method. A gate forming solution including a micell template is coated on the nano structure. A precursor material for synthesizing metal salt is introduced into the nano structure. A floating gate is formed by arranging the metal salt on the tunneling oxide layer by removing the micell template on the semiconductor substrate.