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公开(公告)号:KR100836654B1
公开(公告)日:2008-06-10
申请号:KR1020060100996
申请日:2006-10-17
Applicant: 삼성전기주식회사
IPC: H05K3/12
Abstract: 인쇄회로기판 제조방법이 제공된다.
절연층과 회로패턴을 포함하는 인쇄회로기판을 잉크를 이용하여 제조하는 방법으로서, 절연층에 상응하도록 절연성을 갖는 제1 잉크를 선택적으로 도포하는 제1 헤드; 및 회로패턴에 상응하도록 금속을 포함하는 제2 잉크를 선택적으로 도포하는 제2 헤드, 도포된 잉크를 경화시키는 경화부를 포함하는 인쇄회로기판 제조방법은 하나의 장비만으로 인쇄회로기판을 완성한다는 점에서 공정이 단순하고, 비용이 절감되며, 한번에 매우 얇은 두께로 도포함으로써 건조 혹은 경화시간이 매우 빠르고, 반복하여 형성한 회로패턴의 모서리를 원하는 형상대로 각을 잘 유지할 수 있으며, 에칭이나 도금공정이 없어 부산 폐기물도 적어 친환경적이다.
절연성, 전도성, 경화-
公开(公告)号:KR100827310B1
公开(公告)日:2008-05-06
申请号:KR1020060098808
申请日:2006-10-11
Applicant: 삼성전기주식회사
IPC: H05K3/20
Abstract: 인쇄회로기판 및 그 제조방법에 관한 발명이 개시된다. (a) 제1 범프가 형성되는 제1 범프층을 제공하는 단계; (b) 제1 범프가 삽입될 수 있는 수용홈을 구비한 제2 범프가 형성된 제2 범프층을 제공하는 단계; (c) 제1 범프층 및 제2 범프층을 절연층의 양면에 각각 배치한 후 압착하여 제1 범프가 수용홈에 삽입되도록 하는 단계를 포함하는 인쇄회로기판 제조방법은, 본 발명은 신뢰성이 향상되고, 미세라인 구현이 유리하며, 공정과정을 줄일 수 있는 인쇄회로 기판 및 그 제조방법을 제공할 수 있다.
인쇄회로기판, 범프-
公开(公告)号:KR1020100061021A
公开(公告)日:2010-06-07
申请号:KR1020080119890
申请日:2008-11-28
Applicant: 삼성전기주식회사
Abstract: PURPOSE: A printed circuit board and a manufacturing method thereof are provided to prevent the undercut of a circuit pattern by smoothly performing an electroplating regardless of the thickness of the seed layer. CONSTITUTION: A base substrate including an insulation material(100) is provided. A via hole is formed on the insulation material. A first seed layer(300) is formed on the upper die of the insulation material including the inner side of the via hole. A plating resist layer is formed on the first seed layer and is patterned to have an opening for forming a via and a circuit pattern. A second seed layer(700) is formed on the first seed layer exposed to the opening. The metal layer is formed on the second seed layer exposed to the opening. The plating resist layer and the first seed layer are removed.
Abstract translation: 目的:提供一种印刷电路板及其制造方法,用于通过平滑地执行电镀来防止电路图案的底切,而与种子层的厚度无关。 构成:提供包括绝缘材料(100)的基底基板。 在绝缘材料上形成通孔。 在包括通孔的内侧的绝缘材料的上模具上形成第一籽晶层(300)。 在第一种子层上形成电镀抗蚀剂层,并将其图案化成具有用于形成通孔和电路图案的开口。 在暴露于开口的第一籽晶层上形成第二种子层(700)。 金属层形成在暴露于开口的第二种子层上。 去除电镀抗蚀剂层和第一种子层。
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公开(公告)号:KR1020090029508A
公开(公告)日:2009-03-23
申请号:KR1020070094816
申请日:2007-09-18
Applicant: 삼성전기주식회사
IPC: H05K3/18
CPC classification number: H05K3/4682 , H05K1/0271 , H05K3/0058 , H05K2203/1536
Abstract: A manufacturing method of the printed circuit board using the carrier is provided to enduringly use the carrier by forming the printed circuit board on the metal plate after the metal plate is laminated in the both sides of carrier. The carrier has the size as much as the circuit region forming the circuit pattern. The metal plate(22) larger than the carrier is laminated on the both sides of carrier. The metal plate welds the metal plate in order to surround the side of the carrier with the ultrasonic wave. The first circuit pattern(26) is formed by removing the first copper coating. The insulating layer(28) is laminated on the metal plate. The second copper coating(30) is formed on the via hole inner wall and insulating layer. The second circuit pattern is formed by removes the second copper coating.
Abstract translation: 提供使用载体的印刷电路板的制造方法,以在金属板层叠在载体的两侧之后,通过在金属板上形成印刷电路板来持久地使用载体。 载体具有形成电路图案的电路区域的大小。 大于载体的金属板(22)层叠在载体的两侧。 金属板焊接金属板,以便用超声波围绕载体的一侧。 通过去除第一铜涂层形成第一电路图案(26)。 绝缘层(28)层压在金属板上。 第二铜涂层(30)形成在通孔内壁和绝缘层上。 通过去除第二铜涂层形成第二电路图案。
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公开(公告)号:KR100651474B1
公开(公告)日:2006-11-29
申请号:KR1020050079425
申请日:2005-08-29
Applicant: 삼성전기주식회사
Abstract: A method for fabricating a chip embedded printed circuit board is provided to prevent the damage of a chip during a fabrication process, by not using a subsidiary material like a tape to fix the chip. A laminated layer stacked with a first and a second metal layer is provided to both planes of a first insulation layer(S100). A chip mounting part is formed by removing a part of the first insulation layer and the first metal layer(S110). An adhesive material is coated in the chip mounting part, in order for a part of the chip to be mounted(S120). A second insulation layer having a window with a size corresponding to the chip and an additional laminated layer are stacked, in order to mount the remaining part of the chip(S130). A circuit pattern is formed on the second metal layer(S140).
Abstract translation: 提供一种用于制造芯片嵌入式印刷电路板的方法,以防止在制造过程期间芯片的损坏,其通过不使用诸如带的辅助材料来固定芯片。 在第一绝缘层的两个平面上设置层叠有第一金属层和第二金属层的叠层(S100)。 芯片安装部分通过去除第一绝缘层和第一金属层的一部分而形成(S110)。 在芯片安装部分中涂覆粘合剂材料,以便安装芯片的一部分(S120)。 具有与芯片对应尺寸的窗口的第二绝缘层和附加层压层被堆叠,以便安装芯片的其余部分(S130)。 在第二金属层上形成电路图案(S140)。
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公开(公告)号:KR1020100062600A
公开(公告)日:2010-06-10
申请号:KR1020080121318
申请日:2008-12-02
Applicant: 삼성전기주식회사
CPC classification number: H05K3/18 , H05K1/11 , H05K3/108 , H05K3/24 , H05K2203/0716
Abstract: PURPOSE: A printed circuit board and a manufacturing method thereof are provided to reduce the thickness of an electroless plated layer on an insulating layer and secure the desired thickness of a plated layer in the inner wall of a via hole. CONSTITUTION: A circuit layer formed in the periphery of a via hole forms a metal foil(104), a first electro-less plated layer(108), a second electro-less plated layer(112), and an electrolytic plated layer(114) on an insulating layer(102). A second electro-less plated layer is thinner than the first electro-less plated layer. The via hole successively forms the first electro-less plated layer, the second electro-less plated layer, and the electrolytic plated layer on the inner wall.
Abstract translation: 目的:提供印刷电路板及其制造方法,以减小绝缘层上的化学镀层的厚度,并将电镀层的期望厚度确保在通孔的内壁中。 构成:形成在通孔周围的电路层形成金属箔(104),第一无电镀层(108),第二无电镀层(112)和电解镀层(114) )在绝缘层(102)上。 第二无电镀层比第一无电镀层薄。 通孔依次形成第一无电镀层,第二无电镀层和内壁上的电解镀层。
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公开(公告)号:KR1020080032815A
公开(公告)日:2008-04-16
申请号:KR1020060098808
申请日:2006-10-11
Applicant: 삼성전기주식회사
IPC: H05K3/20
CPC classification number: H05K3/205 , H05K3/4007 , H05K3/4038
Abstract: A PCB(Printed Circuit Board) and a method of manufacturing the same are provided to improve coupling strength between bumps by coupling the bumps formed on top and bottom surfaces through engagement. A method of manufacturing a PCB includes the steps of: preparing a first bump layer having a first bump(S11); preparing a second bump layer having a second bump and a receiving groove to insert the first bump(S12); and inserting the first bump into the receiving groove through compression after arranging the first and second bump layers on both surfaces of an insulating layer respectively(S15). The step includes the step of forming holes corresponding to the first and second bumps on the insulating layer(S13).
Abstract translation: 提供了一种PCB(印刷电路板)及其制造方法,以通过将形成在顶表面和底表面上的凸块通过接合而联接来提高凸块之间的耦合强度。 制造PCB的方法包括以下步骤:制备具有第一凸块的第一凸块层(S11); 制备具有第二凸起的第二凸起层和用于插入所述第一凸起的接收凹槽(S12); 并且在将绝缘层的两个表面上分别设置第一和第二凸起层之后,通过压缩将第一凸起插入接收槽(S15)中。 该步骤包括在绝缘层上形成与第一和第二凸块相对应的孔的步骤(S13)。
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公开(公告)号:KR100783462B1
公开(公告)日:2007-12-07
申请号:KR1020060051009
申请日:2006-06-07
Applicant: 삼성전기주식회사
IPC: H05K3/30
CPC classification number: H05K3/423 , H05K1/185 , H05K3/32 , H05K3/429 , H05K3/4697
Abstract: Electronic components embedded PCB and a method for manufacturing the same are provided to reduce a process cost and a failure by applying an electroplating process without using an electroless plating process. A method for manufacturing an electronic components embedded PCB includes the steps of: (a) forming a through-hole(23) by drilling a core substrate(20) of which a surface is laminated with a metallic layer(22); (b) shielding the through-hole by attaching a seat(24) on one surface of the core substrate; (c) attaching an electronic element(25) in which an electrode(25a) is formed on the seat within the through-hole; and (d) laminating a coating layer on the seat within the through-hole so as to electrically connect the electrode to the metallic layer by forming an electric conductive layer(26b) in the through-hole. The method for manufacturing the electronic components embedded PCB further includes the step of: laminating a conductive material(26a) on the seat within the through-hole between the steps (c) and (d).
Abstract translation: 提供电子部件嵌入式PCB及其制造方法,以通过在不使用无电解电镀工艺的情况下应用电镀工艺来降低工艺成本和故障。 一种电子部件嵌入式PCB的制造方法,其特征在于,包括以下步骤:(a)通过钻入与金属层(22)层叠的表面的芯基板(20)形成贯通孔(23)。 (b)通过在所述芯基板的一个表面上安装座(24)来屏蔽所述通孔; (c)在所述通孔内的所述座椅上安装电子元件(25),其中形成有电极(25a) 以及(d)在所述通孔内的所述座上层叠涂层,以通过在所述通孔中形成导电层(26b)将所述电极与所述金属层电连接。 制造电子部件嵌入式PCB的方法还包括以下步骤:在步骤(c)和(d)之间的通孔内的座椅上层叠导电材料(26a)。
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公开(公告)号:KR100771320B1
公开(公告)日:2007-10-29
申请号:KR1020060048180
申请日:2006-05-29
Applicant: 삼성전기주식회사
CPC classification number: H05K1/185 , H05K3/06 , H05K3/429 , H05K3/4697
Abstract: An embedded chip printed circuit board and a manufacturing method thereof are provided to reduce the manufacturing cost of the PCB(Printed Circuit Board) by manufacturing the PCB without inserting an additive material in the PCB. Electrodes are formed on both sides of a chip(114). A first substrate(100) includes a first insulation layer and a lower outer circuit pattern, which is formed under the first insulation layer. A portion of the chip is mounted on the first insulation layer. The lower outer circuit pattern is connected to the electrode of the chip. A second substrate(101) includes a second insulation layer and an inner circuit pattern. A lower inner circuit pattern is electrically connected to the lower outer circuit pattern through a via-hole. The rest of the chip is mounted on a hole on the second substrate laminated on the first substrate. A third substrate(102) includes a third insulation layer and an upper outer circuit pattern, which is formed on the third insulation layer. The upper outer circuit pattern is electrically connected to the upper inner circuit pattern through the via-hole.
Abstract translation: 提供了一种嵌入式芯片印刷电路板及其制造方法,以通过制造PCB来减少PCB(印刷电路板)的制造成本,而不在PCB中插入添加剂材料。 电极形成在芯片(114)的两侧。 第一基板(100)包括形成在第一绝缘层下方的第一绝缘层和下部外部电路图案。 芯片的一部分安装在第一绝缘层上。 下部外部电路图案连接到芯片的电极。 第二基板(101)包括第二绝缘层和内部电路图案。 较低的内部电路图案通过通孔电连接到下部外部电路图案。 芯片的其余部分安装在层压在第一基板上的第二基板上的孔上。 第三基板(102)包括形成在第三绝缘层上的第三绝缘层和上部外部电路图案。 上部外部电路图案通过通孔电连接到上部内部电路图案。
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