公开(公告)号：KR100652421B1

公开(公告)日：2006-12-01

申请号：KR1020050072995

申请日：2005-08-09

Applicant: 삼성전자주식회사

Inventor： 유상규 ,  강성모 ,  조창현

IPC: H01L21/66

Abstract: A doughnut type parallel probe card and a wafer testing method using the same are provided to improving efficiency of testing by using a doughnut type probing block with an oval type space. A doughnut type parallel probe card(1000) includes a circuit board and a plurality of probing blocks. The circuit board(1100) tests a chip type semiconductor device. The plurality of probing blocks(1002) are installed on one surface of the circuit board. The probing blocks have probes corresponding to unit chips of a wafer. The probing block includes a first region and a second region. The first region(1200) is formed like an oval type structure. The second region is formed in the first region.

Abstract translation: 提供一种环形并联探针卡及使用该卡的晶片测试方法，以通过使用具有椭圆形空间的环形探测块来提高测试的效率。 环型并联探针卡（1000）包括电路板和多个探测块。 电路板（1100）测试芯片型半导体器件。 多个探测块（1002）安装在电路板的一个表面上。 探测块具有与晶片的单位芯片对应的探针。 探测块包括第一区域和第二区域。 第一区域（1200）形成为椭圆形结构。 第二区域形成在第一区域中。

公开(公告)号：KR1020040076114A

公开(公告)日：2004-08-31

申请号：KR1020030011455

申请日：2003-02-24

Applicant: 삼성전자주식회사

Inventor： 강성모 ,  체르니약

IPC: H01L21/66

Abstract: PURPOSE: A probe needle for a probe card is provided to prevent a relatively small quantity of marks of a probe needle from being left in a direction that the probe needle slides in an EDS(electrical die sorting) process by making a contact end of the probe needle have an angle not greater than 90 degrees with respect to the main body of the probe needle. CONSTITUTION: The probe needle(10) has the main body coupled to the probe card and the contact end(20) coupled to a pad(210) on a semiconductor wafer(200) such that the contact end is extended from the end of the main body. The contact end is bent at an angle not greater than 90 degrees with respect to the main body.

Abstract translation: 目的：提供用于探针卡的探针，以防止探针在EDS（电模分选）过程中滑动的方向上留下相对少量的探针标记，方法是使 探针相对于探针的主体具有不大于90度的角度。 结构：探针（10）具有联接到探针卡的主体和耦合到半导体晶片（200）上的焊盘（210）的接触端（20），使得接触端从 主体。 接触端相对于主体以不大于90度的角度弯曲。

公开(公告)号：KR1020020096094A

公开(公告)日：2002-12-31

申请号：KR1020010034140

申请日：2001-06-16

Applicant: 삼성전자주식회사

Inventor： 강기상 ,  강성모

IPC: G01R1/073

CPC classification number: G01R1/07342 ,  Y10S439/912

Abstract: PURPOSE: A probe card for tester head is provided to measure rapidly an electrical parameter of each chip formed on the semiconductor substrate by increasing the number of probe. CONSTITUTION: A plurality of connection portions(121) are arranged on a printed circuit board. The printed circuit board is divided into four sections(120a,120b,120c,120d). The connections portions(121) are arranged on each edge portion of the sections(120a,120b,120c,120d). A stiffener fixing hole(210) is formed between an upper plate and a printed circuit board in order to receive a fixing portion projected from a stiffener. A card holder hole(220) is used for fixing the printed circuit board to a card holder. A fixing pin projected from the card holder is inserted into the card holder hole(220). A guide pin hole(230) is used for receiving a guide pin projected from the card holder.

Abstract translation: 目的：提供用于测试头的探针卡，用于通过增加探针数量快速测量形成在半导体衬底上的每个芯片的电参数。 构成：多个连接部分（121）布置在印刷电路板上。 印刷电路板被分成四个部分（120a，120b，120c，120d）。 连接部分（121）布置在部分（120a，120b，120c，120d）的每个边缘部分上。 在上板和印刷电路板之间形成加强件固定孔（210），以便容纳从加强件突出的固定部分。 卡片保持孔（220）用于将印刷电路板固定到卡座上。 从卡保持器突出的固定销插入卡保持孔（220）中。 引导销孔（230）用于接收从卡保持器突出的引导销。

公开(公告)号：KR1020080057099A

公开(公告)日：2008-06-24

申请号：KR1020060130453

申请日：2006-12-19

Applicant: 삼성전자주식회사

Inventor： 김동건 ,  강성모 ,  서길선

IPC: H01L21/66

CPC classification number: G01R31/2601 ,  G01R1/07314

Abstract: A wafer test method using a probe card is provided to minimize the number of inspections by easily supplying a one-shot inspection region and an inspection method. The entire area of a wafer is mapped to form a map(S100). The maximum value of a one-shot inspection region(para) of a probe card is set(S200). A plurality of inspection blocks which are not more than the maximum value of the one-shot inspection region are set(S300). Each inspection block sequentially and respectively inspects a partial region of the map, transferring from the outer part of the map to the inside of the map(S400). With respect to each inspection block, the number of inspections is calculated to inspect every region of the map corresponding to a region of a plurality of semiconductor chip on the wafer by a minimum number of inspections(S500). The calculated numbers of inspections are compared to calculate a minimum number of inspections(S600). A one-shot inspection region and an inspection transfer direction of the probe card are determined to correspond to the calculated minimum number of inspections(S700). A plurality of semiconductor chips formed on the wafer are inspected by using the probe card whose one-shot inspection region and inspection transfer direction are determined(S800). The para of the probe card can have one of 32, 64, 128, 256 or 512.

Abstract translation: 提供使用探针卡的晶片测试方法，以便通过容易地提供一次性检查区域和检查方法来最小化检查次数。 映射晶片的整个区域以形成映射（S100）。 设置探针卡的一次检查区域（para）的最大值（S200）。 设定不大于一次检查区域的最大值的多个检查块（S300）。 每个检查块依次地分别检查地图的部分区域，从地图的外部部分转移到地图的内部（S400）。 对于每个检查块，计算检查次数以通过最小检查次数来检查与晶片上的多个半导体芯片的区域对应的每个区域的区域（S500）。 将计算出的检查次数进行比较，以计算最少的检查次数（S600）。 确定探针卡的单次检查区域和检查传送方向，以对应于计算的最小检查次数（S700）。 通过使用确定了一次检查区域和检查传送方向的探针卡来检查形成在晶片上的多个半导体芯片（S800）。 探针卡的对位可以有32,64,128,256或512之一。

公开(公告)号：KR100909966B1

公开(公告)日：2009-07-29

申请号：KR1020070053483

申请日：2007-05-31

Applicant: 삼성전자주식회사

Inventor： 강상구 ,  조창현 ,  강성모 ,  유상규 ,  김준연

IPC: G01R1/073

CPC classification number: G01R1/07314 ,  G01R31/2891 ,  Y10T29/49222

Abstract: A multi probe card unit, a probe test device including the multi probe card unit, and methods of fabricating and using the same are provided. The multi probe card unit may include at least one probe card including a first plurality of probes on a first surface of the at least one probe card and a second plurality of probes on a second surface of the at least one probe card.

Abstract translation: 提供了多探针卡单元，包括多探针卡单元的探针测试装置，以及制造和使用它的方法。 多探针卡单元可以包括至少一个探针卡，所述至少一个探针卡包括在所述至少一个探针卡的第一表面上的第一多个探针和在所述至少一个探针卡的第二表面上的第二多个探针。

公开(公告)号：KR1020080105644A

公开(公告)日：2008-12-04

申请号：KR1020070053483

申请日：2007-05-31

Applicant: 삼성전자주식회사

Inventor： 강상구 ,  조창현 ,  강성모 ,  유상규 ,  김준연

IPC: G01R1/073

CPC classification number: G01R1/07314 ,  G01R31/2891 ,  Y10T29/49222

Abstract: A multi probe card unit and probe test device is provided to increase inspection capacity of the EDS process conspicuously by testing a plurality of wafer at the same time. In a probe test apparatus, a probe(110) contacted with the chip pad of the formed on a wafer is included in a first probe card and a second probe card. The connection unit electrically connects a plurality of probe cards is included in. A multi-prop card unit(100) includes a connection unit electrically connecting a plurality of probe cards. The probe card is arranged in vertical or horizontal and the first and second card is arranged to be protruded opposite each other so that a plurality of wafers is accessed to the fist and second probe card.

Abstract translation: 提供多探针卡单元和探针测试装置，通过同时测试多个晶片来显着提高EDS工艺的检测能力。 在探针测试装置中，与形成在晶片上的芯片焊盘接触的探针（110）包括在第一探针卡和第二探针卡中。 连接单元电连接多个探针卡被包括在内。多路卡单元（100）包括电连接多个探针卡的连接单元。 探针卡被布置成垂直或水平，并且第一和第二卡片布置成彼此相对地突出，使得多个晶片被访问到第一和第二探针卡。

公开(公告)号：KR100835281B1

公开(公告)日：2008-06-05

申请号：KR1020070035667

申请日：2007-04-11

Applicant: 삼성전자주식회사

Inventor： 조창현 ,  김준연 ,  강상구 ,  강성모 ,  유상규

IPC: G01R1/067

CPC classification number: G01R31/2889 ,  G01R31/2891

Abstract: Substrate test probing equipment having a force-receiving pattern in a probe card and a forcing part in a test head and usage methods thereof are provided to restrict thermal expansion of a probe card forcibly by contacting the force-receiving pattern to the forcing part and then applying physical force to the force-receiving pattern by the forcing part. In substrate test probing equipment(112), a substrate mover(108) has an upper side. A test head(30) has a resisting plate(RP) positioned on the substrate mover and a forcing part(FP) facing the substrate mover to contact with the resisting plate and extend from the resisting plate. A probe card is disposed between the test head and the substrate mover. In the probe card, a circuit board has upper and lower sides. A force-receiving plate has a force-receiving pattern recessed or protruded to be disposed on the upper side of the circuit plate. The force-receiving plate is fixed on the upper side of the circuit plate to penetrate through the upper and lower sides of the circuit plate. A pin supporting plate is disposed at the lower side of the circuit plate, surrounded by the force-receiving plate, and electrically connected to the circuit plate. An information processing unit(104) is electrically coupled with the probe card, the test head, and the substrate mover. The force-receiving plate corresponds to the resisting plate. The force-receiving pattern contacts with the forcing part. The forcing part applies physical force to the force-receiving pattern.

Abstract translation: 提供具有探针卡中的受力图案和在测试头中的强制部件的基板测试探测设备及其使用方法，以通过将受力图案与强制部件接触来强制地限制探针卡片的热膨胀，然后 通过迫使部分对力接收图案施加物理力。 在基板测试探测设备（112）中，基板移动器（108）具有上侧。 测试头（30）具有位于基板移动件上的阻挡板（RP）和面向基板移动件的强制部件（FP），以与抵抗板接触并从阻力板延伸。 探针卡设置在测试头和基板移动器之间。 在探针卡中，电路板具有上侧和下侧。 力接收板具有凹陷或突出的力接收图案以设置在电路板的上侧。 受力板固定在电路板的上侧，穿过电路板的上侧和下侧。 销支撑板设置在电路板的下侧，被受力板包围，并且电连接到电路板。 信息处理单元（104）与探针卡，测试头和基板移动器电耦合。 受力板对应于阻力板。 力接收图案与强制部件接触。 强迫部分对力接收模式施加物理力。

公开(公告)号：KR1020060082497A

公开(公告)日：2006-07-19

申请号：KR1020050002873

申请日：2005-01-12

Applicant: 삼성전자주식회사

Inventor： 유상규 ,  강기상 ,  김훈정 ,  강성모 ,  조창현

IPC: H01L21/66

CPC classification number: G01R1/07364 ,  G01R1/0491

Abstract: 본 발명은 멀티칩 테스트용 프로브 카드에 관한 것이다. 본 발명은 웨이퍼에 형성된 다수개의 반도체 칩들 중 일부를 동시에 테스트하기 위한 프로브 카드에 있어서, 기판과, 상기 기판 상에 배열되며 전체적인 모양이 상기 웨이퍼에 형성된 반도체 칩들의 전체적인 모양과 유사하도록 배열된 다수개의 프로브 블록들, 및 상기 프로브 블록들 내에 설치되며 상기 반도체 칩들에 형성된 다수개의 패드들에 대응하도록 배열된 다수개의 프로브 니들들을 구비함으로써, 웨이퍼에 대한 테스트 시간이 대폭적으로 감소된다.

公开(公告)号：KR100674938B1

公开(公告)日：2007-01-26

申请号：KR1020050002873

申请日：2005-01-12

Applicant: 삼성전자주식회사

Inventor： 유상규 ,  강기상 ,  김훈정 ,  강성모 ,  조창현

IPC: H01L21/66

CPC classification number: G01R1/07364 ,  G01R1/0491

Abstract: 본 발명은 멀티칩 테스트용 프로브 카드에 관한 것이다. 본 발명은 웨이퍼에 형성된 다수개의 반도체 칩들 중 일부를 동시에 테스트하기 위한 프로브 카드에 있어서, 기판; 상기 기판 상에 배열되며, 전체적인 모양이 상기 웨이퍼에 형성된 반도체 칩들의 전체적인 모양과 유사하도록 배열된 다수개의 프로브 블록들; 및 상기 프로브 블록들 내에 설치되며 상기 반도체 칩들에 형성된 다수개의 패드들에 대응하도록 배열된 다수개의 프로브 니들들을 구비하며, 상기 프로브 블록들의 전체적인 모양을 구성하는 다수개의 변들 중에서 2개의 변들의 길이가 상기 반도체 칩들의 전체적인 모양을 구성하는 다수개의 변들 중에서 대응되는 2변들의 길이보다 짧게 구성됨으로써, 웨이퍼에 대한 테스트 시간이 대폭적으로 감소된다.