公开(公告)号：KR1020140005422A

公开(公告)日：2014-01-15

申请号：KR1020120072472

申请日：2012-07-03

Applicant: 삼성전자주식회사

Inventor： 박대근 ,  강동조 ,  김형준 ,  정진성

IPC: H01L27/146

CPC classification number: H01L31/02161 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14683 ,  H01L31/0203 ,  H01L31/18

Abstract: A semiconductor element forming method includes a step of preparing a first and second substrates, a step of forming metal wires on a first surface of the first substrate, a step of forming a filling insulating layer covering top surfaces of the metal wires and filling gaps between sides of the wires, a step of a buffer insualiating layer softer than the filling insulating layer on the filling insulating layer, a step of forming a capping insulating layer harder than the buffer insulating layer on the buffer insulating layer, and a step of bonding a surface of the second substrate and a surface of the capping insulating layer.

Abstract translation: 半导体元件形成方法包括制备第一和第二基板的步骤，在第一基板的第一表面上形成金属线的步骤，形成覆盖金属线的顶表面的填充绝缘层和填充间隙之间的间隙的步骤 电线的两侧，比填充绝缘层上的填充绝缘层柔软的缓冲层的步骤，在缓冲绝缘层上形成比缓冲绝缘层硬的加盖绝缘层的工序，以及将 第二基板的表面和封盖绝缘层的表面。

公开(公告)号：KR1020070068185A

公开(公告)日：2007-06-29

申请号：KR1020050130011

申请日：2005-12-26

Applicant: 삼성전자주식회사

Inventor： 유문재 ,  박대근

IPC: H01L21/205

CPC classification number: H01L21/67069 ,  H01J37/32357

Abstract: An apparatus for processing the surface of a wafer having a copper pattern using plasma is provided to reduce impurity particles and damage to a chamber and shorten an interval of process time by reducing thermal budget to a wafer and by performing a series of processes for forming a capping layer for protecting a copper pattern and cleaning a process chamber. A wafer(W) is processed in a process chamber(210). Gas is injected to the process chamber by a gas guide pipe(220). The gas introduced from the gas guide pipe is uniformly sprayed to the inside of the process chamber by a shower head(230). A heating block(240) on which a wafer is to be placed is installed in the process chamber. A plasma generating module(270) generates NH3 plasma outside the process chamber. The NH3 plasma generated from the plasma generating module is injected into the process chamber by a plasma guide pipe. The gas in the process chamber is exhausted to the outside by an exhaust pipe(250). The exhaust pipe is opened/shut by a valve(260). The plasma generating module can generate NF3 plasma additionally.

Abstract translation: 提供一种使用等离子体处理具有铜图案的晶片表面的装置，以通过减少对晶片的热量预算来减少杂质颗粒和损坏室并缩短处理时间的间隔，并且通过执行一系列用于形成 用于保护铜图案并清洁处理室的封盖层。 在处理室（210）中处理晶片（W）。 气体通过气体导管（220）注入处理室。 从气体引导管引入的气体通过淋浴喷头（230）均匀地喷射到处理室的内部。 其中放置晶片的加热块（240）安装在处理室中。 等离子体产生模块（270）在处理室外部产生NH 3等离子体。 由等离子体发生模块产生的NH 3等离子体通过等离子体导管注入到处理室中。 处理室中的气体通过排气管（250）排出到外部。 排气管由阀门（260）打开/关闭。 等离子体发生模块可以另外产生NF 3等离子体。

公开(公告)号：KR1020000031122A

公开(公告)日：2000-06-05

申请号：KR1019980046991

申请日：1998-11-03

Applicant: 삼성전자주식회사

Inventor： 이정섭 ,  박대근

IPC: H01L21/02

Abstract: PURPOSE: A thermocouple assembled body of a semiconductor scrubber equipment is provided to improve endurance and, previously, prevent all sorts of safety accidents as installing a thermocouple coated using a ceramic to prevent an electric short between a thermocouple and an incornel with. CONSTITUTION: A thermocouple assembled body of a semiconductor scrubber equipment includes an incornel tube(30), a heating tube(20) surrounding the incornel tube, a body tube(10) surrounding the heating tube, a thermocouple(40), a socket(41) and a male screw part. The ending part of one side of the thermocouple, on which a ceramic coating layer is formed, penetrates the heating tube and the body tube, and detects a temperature of the incornel. The socket is connected to the ending part of other side of the thermocouple. The male screw part is formed between the thermocouple and the socket, and combined to the female screw part formed on the body tube using a screw.

Abstract translation: 目的：提供半导体洗涤器设备的热电偶组装体，以提高耐久性，并且以前防止了安装使用陶瓷涂覆的热电偶的各种安全事故，以防止热电偶和阴螺纹之间的电短路。 构成：半导体洗涤器设备的热电偶组装体包括一根橡皮管（30），一个围绕着阴茎管的加热管（20），围绕加热管的一个主体管（10），一个热电偶（40），一个插座 41）和外螺纹部分。 形成有陶瓷涂层的热电偶的一侧的末端部分穿透加热管和体管，并检测陶瓷涂层的温度。 插座连接到热电偶另一侧的端部。 阳螺纹部分形成在热电偶和插座之间，并且使用螺钉组合到形成在主体管上的阴螺纹部分。

公开(公告)号：KR1020170057680A

公开(公告)日：2017-05-25

申请号：KR1020150161067

申请日：2015-11-17

Applicant: 삼성전자주식회사

Inventor： 박대근 ,  박기현 ,  이훈희 ,  추성민

IPC: G09G3/20

CPC classification number: G09G5/10 ,  G09G2320/0233 ,  G09G2320/0295 ,  G09G2320/0626 ,  G09G2320/0646 ,  G09G2330/021 ,  G09G2360/144

Abstract: 본발명의일 실시예에의한전자장치는, 디스플레이및 상기디스플레이와전기적으로연결된프로세서를포함할수 있다. 상기프로세서는, 상기디스플레이에재생중인컨텐츠의프레임을적어도하나의픽셀을포함하는복수개의블록(block)들로분류하고, 상기복수개의블록들각각의평균휘도값을확인하고, 상기복수개의블록들의평균휘도값에기초하여, 지정된적어도하나의조건을만족하는지판단하고, 상기적어도하나의조건을만족하는경우, 상기복수개의블록들에포함된적어도하나의픽셀의휘도를조정할수 있다. 이밖의다양한실시예들이가능하다.

Abstract translation: 根据本发明实施例的电子设备可以包括显示器和电连接到显示器的处理器。 处理器被配置为将在显示器上再现的内容的帧分类为包括至少一个像素的多个块，以检查多个块中的每一个的平均亮度值， 基于平均亮度值确定是否满足指定的至少一个条件，并且当满足至少一个条件时，调整包括在多个块中的至少一个像素的亮度。 各种其他实施例是可能的。

公开(公告)号：KR1020170005756A

公开(公告)日：2017-01-16

申请号：KR1020160064994

申请日：2016-05-26

Applicant: 삼성전자주식회사

Inventor： 박현희 ,  김성오 ,  김재문 ,  이용만 ,  박경민 ,  박기현 ,  박대근 ,  장슬기 ,  전형주 ,  최종범 ,  김광태 ,  김수형 ,  염동현 ,  이기혁

IPC: G09G5/00 ,  G09G5/02

Abstract: 본발명의다양한실시예들은, 전자장치에있어서, 상기전자장치의제 1 면에대응하는방향으로콘텐트를표시하기위한디스플레이; 상기전자장치의제 2 면에입사되는빛을감지하기위한센서; 및프로세서(processor)를포함하고, 상기프로세서는, 상기감지된빛에적어도기반하여, 상기전자장치의주변의밝기정보를결정하고, 상기밝기정보에적어도기반하여, 상기디스플레이의적어도하나의속성또는상기콘텐트의적어도하나의속성을조정하도록설정될수 있다. 또한, 본발명의다양한실시예들은다른실시예들이가능할수 있다.

公开(公告)号：KR1020100001269A

公开(公告)日：2010-01-06

申请号：KR1020080061119

申请日：2008-06-26

Applicant: 삼성전자주식회사

Inventor： 박대근

IPC: H04N5/58

CPC classification number: H04N5/58 ,  H04N9/64

Abstract: PURPOSE: An image compensation method for compensating an image according to a playback mode and an apparatus thereof and a digital photographing device using the same are provided to perform image compensation according to the amount of external light without a complex calculation process. CONSTITUTION: A mode selector selects a playback mode which displays an image according to the selection of a user. A controller(71) generates control information which controls the image according to the selected playback mode. An image compensation unit(73) compensates the image according to the generated control information. The control information is comprised of the control information which controls the brightness of the image and the control information which controls the saturation of the image.

Abstract translation: 目的：提供一种根据播放模式补偿图像的图像补偿方法及其装置以及使用其的数字摄影装置，以便在没有复杂计算处理的情况下根据外部光量进行图像补偿。 构成：模式选择器根据用户的选择选择显示图像的播放模式。 控制器（71）产生根据所选择的播放模式来控制图像的控制信息。 图像补偿单元（73）根据生成的控制信息补偿图像。 控制信息由控制图像的亮度的控制信息和控制图像的饱和度的控制信息组成。

公开(公告)号：KR100667650B1

公开(公告)日：2007-01-12

申请号：KR1020050108440

申请日：2005-11-14

Applicant: 삼성전자주식회사

Inventor： 박대근 ,  오혁상 ,  정주혁 ,  유문재

IPC: H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14685

Abstract: An imaging device and its manufacturing method are provided to improve optical sensitivity by using a light opening unit pattern for collecting a light before being incident into a photo diode. Semiconductor devices including an optical device is formed on a substrate(100). A lower dielectric(130) is formed on the substrate and has an optical path groove(255) on an upper portion of the optical device. The optical path groove has a lower surface whose shape is convex upwardly to increase optical sensitivity of the optical device. An interlayer dielectric structure is formed on the lower dielectric to be extended to the lower optical path groove. A light opening unit(254) is formed on the interlayer dielectric structure. A light opening unit pattern(256) is formed to gap-fill the optical path groove and the light opening unit. A micro lens(310) is located on an upper portion of the light opening unit on the interlayer dielectric structure.

Abstract translation: 提供了一种成像装置及其制造方法，以通过使用在入射到光电二极管之前采集光的开启单元图案来提高光学灵敏度。 包括光学器件的半导体器件形成在衬底（100）上。 在基板上形成下电介质（130），在光学元件的上部具有光路槽（255）。 光路槽具有形状向上凸起的下表面，以提高光学装置的光学灵敏度。 在下电介质上形成层间电介质结构，延伸到下光路槽。 在层间电介质结构上形成开光单元（254）。 形成开口单元图案（256）以间隙地填充光路槽和光开启单元。 微透镜（310）位于层间电介质结构上的开孔单元的上部。

公开(公告)号：KR1020050026270A

公开(公告)日：2005-03-15

申请号：KR1020030063289

申请日：2003-09-09

Applicant: 삼성전자주식회사

Inventor： 강기호 ,  오혁상 ,  이정우 ,  박대근

IPC: H01L21/28

CPC classification number: H01L21/76808 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76835

Abstract: Methods of manufacturing a semiconductor device are provided to improve the step coverage of a seed layer by forming a slant portion made of residues of an etch stop layer in a bottom of a connection hole. An etch stop layer(140) and an interlayer dielectric(150) are sequentially formed on a semiconductor substrate(100) with a lower conductive layer. A via hole(155c) for exposing partially the etch stop layer to the outside is formed in the interlayer dielectric. A portion with slant(s) is formed at lower sidewalls of the connection hole by etching selectively the exposed etch stop layer.

Abstract translation: 提供制造半导体器件的方法，以通过在连接孔的底部形成由蚀刻停止层的残留物制成的倾斜部分来改善种子层的台阶覆盖。 在具有下导电层的半导体衬底（100）上依次形成蚀刻停止层（140）和层间电介质（150）。 用于将蚀刻停止层部分暴露于外部的通孔（155c）形成在层间电介质中。 具有倾斜的部分通过选择性地蚀刻暴露的蚀刻停止层而形成在连接孔的下侧壁处。

公开(公告)号：KR1020040017905A

公开(公告)日：2004-03-02

申请号：KR1020020049836

申请日：2002-08-22

Applicant: 삼성전자주식회사

Inventor： 박대근 ,  하상록 ,  정주혁 ,  오혁상

IPC: H01L21/283

Abstract: PURPOSE: A method for forming a metal pattern of a semiconductor device is provided to be capable of stably forming an upper pattern on a lower via part. CONSTITUTION: The first insulating layer(120) is formed at the upper portion of a semiconductor substrate(100). The first via holes are formed by carrying out a photo etching process at the first insulating layer using the first photo mask. The first via parts(130a,130b) are formed by filling the first metal at the first via holes. An etch stop layer(140) and the second insulating layer(150) are sequentially formed at the upper portion of the resultant structure. The second via holes are then formed for exposing the upper surfaces of the first via parts. A metal layer is formed at the upper portion of the resultant structure for filling the second via holes. A metal pattern is then formed by selectively patterning the metal layer.

Abstract translation: 目的：提供一种用于形成半导体器件的金属图案的方法，以能够在下部通孔部分上稳定地形成上部图案。 构成：第一绝缘层（120）形成在半导体衬底（100）的上部。 通过使用第一光掩模在第一绝缘层处进行光蚀刻工艺来形成第一通孔。 通过在第一通孔处填充第一金属来形成第一通孔部分（130a，130b）。 蚀刻停止层（140）和第二绝缘层（150）依次形成在所得结构的上部。 然后形成第二通孔以暴露第一通孔部分的上表面。 在所得结构的上部形成有用于填充第二通孔的金属层。 然后通过选择性地图案化金属层来形成金属图案。

公开(公告)号：KR1020040074769A

公开(公告)日：2004-08-26

申请号：KR1020030010165

申请日：2003-02-18

Applicant: 삼성전자주식회사

Inventor： 박대근 ,  하상록 ,  정주혁 ,  오혁상 ,  이정우 ,  강기호

IPC: H01L27/04

Abstract: PURPOSE: A method for fabricating a MIM capacitor is provided to obtain a process margin in a cleaning process by forming a dielectric layer on a diffusion barrier of a metal line. CONSTITUTION: The first metal line(110a) and the second metal line(110b) are formed on a substrate(100). A diffusion barrier pattern for exposing the first metal line is formed on the substrate in order to prevent the damage of the second metal line. A dielectric layer is formed on the diffusion barrier pattern and the second metal line. A top electrode layer is formed on the dielectric layer. The first photoresist pattern is formed on the top electrode layer in order to define a capacitor region. A top electrode(140a) of a capacitor is formed by over-etching the exposed top electrode layer.

Abstract translation: 目的：提供一种用于制造MIM电容器的方法，以通过在金属线的扩散阻挡层上形成电介质层来获得清洁过程中的工艺余量。 构成：第一金属线（110a）和第二金属线（110b）形成在基板（100）上。 为了防止第二金属线的损伤，在基板上形成用于露出第一金属线的扩散阻挡图案。 在扩散阻挡图案和第二金属线上形成介电层。 在电介质层上形成顶部电极层。 为了限定电容器区域，在顶部电极层上形成第一光致抗蚀剂图案。 通过过度蚀刻暴露的顶部电极层来形成电容器的顶部电极（140a）。