Abstract:
차동 출력을 갖는 델타-시그마 모듈레이터가 개시된다. 상기 델타-시그마 모듈레이터는, 비 반전 적분 신호와 반전 적분 신호를 생성하는 스위치드-커패시터 적분기를 포함한다. 상기 스위치드-커패시터 적분기는, 제어 신호에 응답하여 입력 신호를 샘플링하고, 상기 제어 신호에 응답하여 상기 입력 신호 및 피드백 신호를 적분 커패시터터를 통해 적분하는 스위치드-커패시터 회로와, 상기 피드백 신호를 생성하는 피드백 회로를 포함할 수 있다.
Abstract:
PURPOSE: A memory card which inserts a test firmware to a controller is provided to perform a memory test in a state that the memory is not connected to an external device by inserting self-test firmware to a controller. CONSTITUTION: A memory cell(12) records data. A connector(14) is connected to an external device and transmits/receives a signal including a command and data. A controller(11) switches a signal with the connector and analyzes the received signal. The controller accesses the memory cell according to an analysis result. A firmware(13) controls an operation of the controller and is set up in a test or user mode.
Abstract:
PURPOSE: A method for manufacturing a semiconductor device is provided to prevent the characteristic deterioration of the semiconductor device by suppressing byproducts through dual protection patterns when conductive films are etched. CONSTITUTION: A first insulation film (101), a first conductive film (102), a dielectric film (103), a metal film, and a hard mask film are successively formed on a substrate (100). A hard mask pattern (116) is formed by patterning the hard mask film. A metal gate electrode (105a) with an exposed side is formed by patterning the metal film. A first protection film is formed on the exposed side of the metal gate electrode. A second gate electrode (104a) with an exposed side is formed by patterning a second conductive film. A second protection film (108) is formed on the exposed side of the second gate electrode.
Abstract:
PURPOSE: An initializing method of a memory system is provided to resolve recognition failure in a user environment by performing a second initializing operation without initializing data when an operation standby signal is not initialized by a first initializing operation with the initializing data. CONSTITUTION: A boot code stored in a boot memory of a controller is executed according to the reception of an initializing signal(S120). Initializing data stored in a non-volatile memory device is loaded to an operating memory of the controller according to the execution of the boot code(S140). The initializing data loaded to the operating memory is executed(S150). When an operation standby signal is not activated by the execution of the initializing data, the boot code is re-executed(S180). The initializing data stored in the non-volatile memory device is deleted. New initializing data is updated in the non-volatile memory device and the updated initializing data is loaded to the operating memory(S210). [Reference numerals] (AA) Start; (BB) End; (S110) Receiving an initializing signal; (S120) Executing a boot code; (S130) Confirming initializing data?; (S140) Loading the initializing data in an operating memory; (S150) Executing the initializing data; (S160) Enabling a standby signal?; (S170) FRM setting; (S180) Re-executing the boot code; (S190) Initializing a non-volatile memory device; (S200) Updating the initializing data; (S210) Loading the updated initializing data in the operating memory; (S220) Executing the updated initializing data
Abstract:
반도체 기판을 신속하게 검사하여 이를 가공 공정에 바로 적용하기 위한 가공 방법 및 가공 장비에 있어서, 반도체 기판들을 해당 가공 장비에 로딩 후, 샘플링 검사의 필요여부를 판단한다. 샘플링 검사가 필요 시, 샘플 반도체 기판을 선택하여 초기 상태를 측정한 후, 시험 가공 공정을 수행한다. 이후, 해당 가공 장비 내부에 배치된 검사 장치에서 샘플 반도체 기판을 검사하고, 검사 결과를 실시간으로 제어부에 제공하여 주 가공 공정의 진행 여부 및 추가 검사 공정의 진행 여부를 판단한다. 이 경우, 검사 유닛은 프로세스 챔버와 선택적으로 연통되며, 제어부는 검사 유닛으로부터 검사 결과를 실시간으로 제공받아 가공 공정을 제어한다. 본 발명에 의하면, 검사소요 시간을 최대한 단축할 수 있으며, 검사 결과를 바로 가공 공정에 반영함으로써 생산수율을 극대화할 수 있다.
Abstract:
Disclosed is an etching method for semiconductor processing by which a pattern loading phenomenon is reduced. First, plasma is generated while setting a bias power applied to a wafer to zero and applying a source power. After a predetermined time period, an etching process is implemented onto a predetermined layer formed on the wafer by setting the bias power to a predetermined value. Since by-products generated during preceding etching processes can be readily removed during an etching using plasma, an etching process change due to a difference of pattern densities can be reduced. In addition, a progressive pattern loading generated as the number of processed wafers increase, can be prevented.