公开(公告)号：KR101776333B1

公开(公告)日：2017-09-08

申请号：KR1020110127489

申请日：2011-12-01

Applicant: 현대자동차주식회사

Inventor： 한창완 ,  이용성 ,  이기춘

IPC: H01L21/3065 ,  H01L21/336 ,  H01L29/78

Abstract: 본발명은탄화규소반도체소자용트렌치제조공정에관한것으로, 트렌치내부에그래스가발생하거나또는마이크로트렌칭현상이나타나는것을방지하여, 트렌치벽면의기울기는수직에가깝고바닥면은평탄한 U형구조를가질수 있도록하는탄화규소반도체소자용트렌치제조공정에관한것이다. 이를위해본 발명에서는탄화규소반도체웨이퍼를투입하지않은채, 반응기내부에폴리머를증착하는단계와; 식각마스크가패터닝된탄화규소반도체웨이퍼를반응기내로투입하고, 식각가스를공급하면서바이어스전력및 유도결합플라즈마(ICP) 전력을인가하여트렌치식각을수행하는단계;를포함하며, 상기탄화규소반도체웨이퍼의식각마스크는인듐틴 산화물계물질로패터닝된것을특징으로하는탄화규소반도체소자용트렌치제조공정을제공한다.

公开(公告)号：KR1020130061269A

公开(公告)日：2013-06-11

申请号：KR1020110127489

申请日：2011-12-01

Applicant: 현대자동차주식회사

Inventor： 한창완 ,  이용성 ,  이기춘

IPC: H01L21/3065 ,  H01L21/336 ,  H01L29/78

CPC classification number: H01L29/42356 ,  H01L21/426 ,  H01L21/67363 ,  H01L21/76831 ,  H01L29/66712

Abstract: PURPOSE: A method for forming a trench for a silicon carbide semiconductor device is provided to simplify a manufacturing process by performing a two-step process once. CONSTITUTION: A polymer is deposited in a reactor excluding a wafer(S1). The wafer is put into the reactor. Electric power is applied to etch a trench(S2). An etching mask of the wafer is patterned with indium tin oxide. [Reference numerals] (S1) Polymer deposition in a reactor; (S2) Etching

Abstract translation: 目的：提供一种用于形成用于碳化硅半导体器件的沟槽的方法，以通过执行两步法一次来简化制造过程。 构成：将聚合物沉积在不包括晶片的反应器（S1）中。 将晶片放入反应器中。 施加电力来蚀刻沟槽（S2）。 用铟锡氧化物对晶片的蚀刻掩模进行图案化。 （附图标记）（S1）反应器中的聚合物沉积; （S2）蚀刻

公开(公告)号：KR1020130063089A

公开(公告)日：2013-06-14

申请号：KR1020110129409

申请日：2011-12-06

Applicant: 현대자동차주식회사

Inventor： 이희원 ,  한창완

IPC: H01L21/336 ,  H01L29/78 ,  H01L21/306

CPC classification number: H01L29/4236 ,  H01L21/0465 ,  H01L21/30621 ,  H01L21/30625 ,  H01L21/76831 ,  H01L29/42356

Abstract: PURPOSE: A method for forming the trench of a semiconductor device is provided to secure a U-shaped trench by using a double etching process consisting of a preliminary process and a main etching process without the generation of a corner pit. CONSTITUTION: A preliminary etching mask(22) is formed to expose the center part of a trench formation region in the surface of a semiconductor wafer(10). A preliminary etching process is performed on the exposed surface of the semiconductor wafer by using the preliminary etching mask with a first etch depth. The preliminary etching mask is removed. A main etching mask(23,24) is formed to expose the trench formation region. An additional main etching process is performed on the exposed semiconductor wafer by using the main etching mask with a preset trench formation depth. [Reference numerals] (AA) Preliminary etching region; (BB) Preliminary etching depth; (CC) Trench forming depth; (DD) Trench forming region

Abstract translation: 目的：提供一种用于形成半导体器件的沟槽的方法，通过使用由初步工艺和主蚀刻工艺组成的双重蚀刻工艺而不产生角坑来固定U形沟槽。 构成：形成初步蚀刻掩模（22）以暴露半导体晶片（10）的表面中的沟槽形成区域的中心部分。 通过使用具有第一蚀刻深度的预蚀刻掩模，对半导体晶片的暴露表面进行初步蚀刻处理。 去除初步蚀刻掩模。 形成主蚀刻掩模（23,24）以暴露沟槽形成区域。 通过使用具有预设沟槽形成深度的主蚀刻掩模，在暴露的半导体晶片上执行附加的主蚀刻工艺。 （附图标记）（AA）初步蚀刻区域; （BB）初步蚀刻深度; （CC）沟槽成形深度; （DD）沟槽形成区域