公开(公告)号：EP2804209A1

公开(公告)日：2014-11-19

申请号：EP13168251.0

申请日：2013-05-17

Applicant: ABB Technology AG

Inventor： Brem, Franziska ,  Liu, Chunlei ,  Hartmann, Samuel ,  Schnell, Raffael ,  Duran, Hamit

IPC: H01L23/495 ,  H01L21/56 ,  H01L25/07

CPC classification number: H01L23/49524 ,  H01L21/566 ,  H01L23/3121 ,  H01L23/49833 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/072 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/06181 ,  H01L2224/27013 ,  H01L2224/27318 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29194 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/371 ,  H01L2224/40137 ,  H01L2224/40229 ,  H01L2224/40249 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/85205 ,  H01L2224/92165 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/48247 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for producing an electronics module (44, 44', 44") comprises the steps of: bonding a semiconductor device (12) to a first substrate (10); moulding the semiconductor device (12) and the first substrate (10) into a moulding material (32), such that the semiconductor device (12) and the first substrate (10) are at least partially covered by the moulding material (32) and such that the moulding material (32) comprises an opening (34) to a bonding area (20) of the semiconductor device (12); positioning a second substrate (46) opposite to the first substrate (10) with respect to the semiconductor device (10); and bonding the second substrate (46) to the bonding area (20) of the semiconductor device (12).

Abstract translation: 一种用于制造电子模块（44,44'，44“）的方法包括以下步骤：将半导体器件（12）接合到第一衬底（10）;将半导体器件（12）和第一衬底（10） 成型材料（32），使得半导体器件（12）和第一基板（10）至少部分地被模制材料（32）覆盖，并且使得模制材料（32）包括开口（34） 到所述半导体器件（12）的接合区域（20）;相对于所述半导体器件（10）定位与所述第一衬底（10）相对的第二衬底（46）;以及将所述第二衬底（46） 半导体器件（12）的接合区域（20）。

公开(公告)号：EP2800131A1

公开(公告)日：2014-11-05

申请号：EP13165780.1

申请日：2013-04-29

Applicant: ABB Technology AG

Inventor： Liu, Chunlei ,  Brem, Franziska ,  Simon, Reinhard

IPC: H01L21/603

CPC classification number: H01L24/75 ,  H01L24/83 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/7511 ,  H01L2224/75272 ,  H01L2224/75317 ,  H01L2224/7598 ,  H01L2224/8309 ,  H01L2224/83091 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83209 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15787 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/05032 ,  H01L2924/05432 ,  H01L2924/05042 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of bonding an electronics semiconductor device (12) to a substrate (14) comprises the steps of: depositing a layer (20) of metallic particles on a bonding area of the semiconductor device (12) and/or of the substrate (14); positioning the semiconductor device (12) on the substrate (14), such that the layer (20) is positioned between the semiconductor device (12) and the substrate (14);enclosing the semiconductor device (12) and the substrate (14) with a flexible bag (22); evacuating the interior of the bag (22) and sintering the semiconductor device (12) and the substrate (14) together by applying heat and pressure to the layer (20). The heat and the pressure are applied by a gas (44) that surrounds the flexible bag (22) which encloses the semiconductor device (12) and the substrate (14).

Abstract translation: 将电子半导体器件（12）接合到衬底（14）的方法包括以下步骤：在半导体器件（12）和/或衬底（14）的接合区域上沉积金属颗粒层（20） ）; 将半导体器件（12）定位在衬底（14）上，使得层（20）位于半导体器件（12）和衬底（14）之间;封装半导体器件（12）和衬底（14） 具有柔性袋（22）; 通过向层（20）施加热和压力，抽空袋（22）的内部并将半导体器件（12）和衬底（14）烧结在一起。 热和压力通过围绕包围半导体器件（12）和衬底（14）的柔性袋（22）的气体（44）施加。

公开(公告)号：EP3007220A1

公开(公告)日：2016-04-13

申请号：EP14188427.0

申请日：2014-10-10

Applicant: ABB Technology AG

Inventor： Mohn, Fabian ,  Liu, Chunlei ,  Commin, Paul

IPC: H01L23/051 ,  H01L23/16

CPC classification number: H01L23/051 ,  H01L23/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to a power semiconductor device (10), comprising a power semiconductor element (12) with an upper side (14) and with a lower side (16), the upper side (14) being located opposite to the lower side (16); a first electrode (18) and a second electrode (20), wherein the power semiconductor element (12) is arranged between the first electrode (18) and the second electrode (20) such, that the upper side (14) is in electrical contact to the first electrode (18), and that the lower side (16) is in electrical contact to the second electrode (20), and wherein a housing arrangement (26) is provided at least comprising the first electrode (18), the second electrode (20) and an electrical insulator (28), wherein at least one safety element (34) comprising a porous material is provided inside the housing arrangement (26). A power semiconductor device (10) according to the present invention may provide an improved capability against a rupture of the housing arrangement (26).

Abstract translation: 本发明涉及一种功率半导体器件（10），其包括具有上侧（14）和下侧（16）的功率半导体元件（12），所述上侧面（14）与所述下侧 （16）; 第一电极（18）和第二电极（20），其中所述功率半导体元件（12）布置在所述第一电极（18）和所述第二电极（20）之间，使得所述上侧（14）处于电气 接触到第一电极（18），并且下侧（16）与第二电极（20）电接触，并且其中提供至少包括第一电极（18）的壳体装置（26） 第二电极（20）和电绝缘体（28），其中至少一个包括多孔材料的安全元件（34）设置在所述壳体装置（26）的内部。 根据本发明的功率半导体器件（10）可以提供抵抗壳体装置（26）破裂的改进的能力。

公开(公告)号：EP2800130A1

公开(公告)日：2014-11-05

申请号：EP13165820.5

申请日：2013-04-29

Applicant: ABB Technology AG

Inventor： Brem, Franziska ,  Liu, Chunlei ,  Duran, Hamit

IPC: H01L21/60 ,  H01L23/13 ,  H01L23/495 ,  H01L23/051

CPC classification number: H01L24/92 ,  H01L21/6836 ,  H01L23/051 ,  H01L23/13 ,  H01L23/16 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/3735 ,  H01L23/49503 ,  H01L23/49513 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/95 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/04026 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/26135 ,  H01L2224/26165 ,  H01L2224/2746 ,  H01L2224/2747 ,  H01L2224/291 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32227 ,  H01L2224/32238 ,  H01L2224/32258 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/33181 ,  H01L2224/83007 ,  H01L2224/83101 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/8321 ,  H01L2224/83222 ,  H01L2224/83385 ,  H01L2224/83439 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83825 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2924/13055 ,  H01L2924/15159 ,  H01L2924/15162 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

Abstract: A method for bonding an electronics chip (10) to a substrate (12), the method comprising the steps of: coating a bonding area (14) of the chip (10) with a first metal layer (18); providing a bonding area (24) of the substrate (12) and/or the bonding area (14) of the chip (10) with a low melting point metal layer (30), wherein the bonding area (24) of the substrate (12) comprises a second metal layer (28); attaching a spacer (20) to the chip (10) and/or the substrate (12); positioning and fixing the chip (10) on the substrate (12); and transient liquid phase bonding the chip (10) to the substrate (12) by melting the low melting point layer (30), wherein the spacer (20) provides a specific distance between the first metal layer (18) and the second metal layer (28).

Abstract translation: 一种用于电子芯片（10）的键合到基底（12）的方法，该方法包括以下步骤：涂覆所述芯片（10）与第一金属层（18）的接合区域（14）; 提供所述基板的基板的接合区（24）（12）和/或芯片（10）具有低的低熔点金属层（30）的接合区域（14），其中，所述结合区域（24）（ 12）包括第二金属层（28）; 附接的间隔件（20）与芯片（10）和/或基底（12）; 定位和固定在基板上的芯片（10）（12）; 和瞬态液相接合芯片（10）到所述衬底（12）通过熔化低熔点层（30），其中所述间隔物（20）提供所述第一金属层（18）和第二金属层之间的特定距离 （28）。