公开(公告)号：WO1996013061A1

公开(公告)日：1996-05-02

申请号：PCT/US1995012129

申请日：1995-09-25

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  PRAMANICK, Shekhar

IPC: H01L21/283

CPC classification number: H01L21/28518

Abstract: Subsequent to providing a metal layer (42) a silicon body (10), a layer of amorphous silicon of the silicon body is formed by ion implantation through the metal layer. Subsequently, the metal and amorphous silicon all reacted to form a silicide by raising the temperature of the device.

Abstract translation: 在提供硅体（10）的金属层（42）之后，通过离子注入通过金属层形成硅体的非晶硅层。 随后，通过提高器件的温度，金属和非晶硅都反应形成硅化物。

公开(公告)号：WO1998009318A1

公开(公告)日：1998-03-05

申请号：PCT/US1997005133

申请日：1997-03-28

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  PRAMANICK, Shekhar ,  SINGH, Bhanwar ,  NG, Che-Hoo

IPC: H01L21/027

CPC classification number: H01L21/76886 ,  H01L21/0276 ,  H01L21/76888 ,  Y10S438/952

Abstract: The application of a dissimilar anti-reflective coating on a conductive layer during photolithographic processing is avoided, as by modifying a portion of the upper surface (21A) of the conductive layer (21) to exhibit anti-reflective properties. In an embodiment of the present invention, impurity ions are implanted into a portion of the upper surface (21A) of an aluminum or an aluminum-alloy conductive layer (21) to render the upper portion (21A) substantially amorphous and, hence, decrease its reflectivity to perform an anti-reflective function.

Abstract translation: 通过改变导电层（21）的上表面（21A）的一部分以显示抗反射性能，避免了在光刻处理期间在导电层上施加不同的抗反射涂层。 在本发明的一个实施例中，杂质离子注入到铝或铝合金导电层（21）的上表面（21A）的一部分中，以使上部（21A）基本上是无定形的，因此减小 其反射性可以进行抗反射功能。

公开(公告)号：WO1996017376A1

公开(公告)日：1996-06-06

申请号：PCT/US1995015260

申请日：1995-11-22

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  PRAMANICK, Shekhar ,  LUNING, Scott ,  FEWKES, Jonathan

IPC: H01L21/027

CPC classification number: G03F7/091 ,  H01L21/0276 ,  H01L21/32137

Abstract: A structure for patterning a polysilicon layer includes a TiN layer located above an amorphous silicon (a-Si) layer forming a TiN/a-Si stack. The TiN/a-Si stack is located above the polysilicon layer. The TiN layer serves as an ARC to reduce overexposure of the photoresist used to pattern the polysilicon layer, while the a-Si layer prevents contamination of the layer below the polysilicon layer.

Abstract translation: 用于图案化多晶硅层的结构包括位于形成TiN / a-Si叠层的非晶硅（a-Si）层之上的TiN层。 TiN / a-Si堆叠位于多晶硅层的上方。 TiN层用作ARC以减少用于图案化多晶硅层的光致抗蚀剂的过度曝光，而a-Si层防止多晶硅层下面的层被污染。

公开(公告)号：EP0736224A1

公开(公告)日：1996-10-09

申请号：EP95933912.0

申请日：1995-09-25

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： PRAMANICK, Shekhar

IPC: H01L21 ,  H01L27

CPC classification number: H01L21/28518

Abstract: Subsequent to providing a metal layer (42) a silicon body (10), a layer of amorphous silicon of the silicon body is formed by ion implantation through the metal layer. Subsequently, the metal and amorphous silicon all reacted to form a silicide by raising the temperature of the device.

公开(公告)号：EP0932912A1

公开(公告)日：1999-08-04

申请号：EP97916256.0

申请日：1997-03-28

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： PRAMANICK, Shekhar ,  SINGH, Bhanwar ,  NG, Che-Hoo

IPC: H01L21

CPC classification number: H01L21/76886 ,  H01L21/0276 ,  H01L21/76888 ,  Y10S438/952

Abstract: The application of a dissimilar anti-reflective coating on a conductive layer during photolithographic processing is avoided, as by modifying a portion of the upper surface (21A) of the conductive layer (21) to exhibit anti-reflective properties. In an embodiment of the present invention, impurity ions are implanted into a portion of the upper surface (21A) of an aluminum or an aluminum-alloy conductive layer (21) to render the upper portion (21A) substantially amorphous and, hence, decrease its reflectivity to perform an anti-reflective function.

公开(公告)号：EP0795199B1

公开(公告)日：2005-11-09

申请号：EP95942471.4

申请日：1995-11-22

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： PRAMANICK, Shekhar ,  LUNING, Scott ,  FEWKES, Jonathan

IPC: H01L21/027 ,  H01L21/321

CPC classification number: G03F7/091 ,  H01L21/0276 ,  H01L21/32137

Abstract: A structure for patterning a polysilicon layer includes a TiN layer located above an amorphous silicon (a-Si) layer forming a TiN/a-Si stack. The TiN/a-Si stack is located above the polysilicon layer. The TiN layer serves as an ARC to reduce overexposure of the photoresist used to pattern the polysilicon layer, while the a-Si layer prevents contamination of the layer below the polysilicon layer.

公开(公告)号：EP0736224B1

公开(公告)日：2001-12-12

申请号：EP95933912.8

申请日：1995-09-25

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： PRAMANICK, Shekhar

IPC: H01L21/283 ,  H01L21/3205 ,  H01L21/285

CPC classification number: H01L21/28518

Abstract: Subsequent to providing a metal layer (42) a silicon body (10), a layer of amorphous silicon of the silicon body is formed by ion implantation through the metal layer. Subsequently, the metal and amorphous silicon all reacted to form a silicide by raising the temperature of the device.

公开(公告)号：EP0932912B1

公开(公告)日：2003-09-17

申请号：EP97916256.7

申请日：1997-03-28

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： PRAMANICK, Shekhar ,  SINGH, Bhanwar ,  NG, Che-Hoo

IPC: H01L21/027 ,  H01L21/768

CPC classification number: H01L21/76886 ,  H01L21/0276 ,  H01L21/76888 ,  Y10S438/952

Abstract: The application of a dissimilar anti-reflective coating on a conductive layer during photolithographic processing is avoided, as by modifying a portion of the upper surface (21A) of the conductive layer (21) to exhibit anti-reflective properties. In an embodiment of the present invention, impurity ions are implanted into a portion of the upper surface (21A) of an aluminum or an aluminum-alloy conductive layer (21) to render the upper portion (21A) substantially amorphous and, hence, decrease its reflectivity to perform an anti-reflective function.

公开(公告)号：EP0963604A1

公开(公告)日：1999-12-15

申请号：EP98945781.0

申请日：1998-08-27

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： TRAN, Khanh, Q. ,  BESSER, Paul, R. ,  MORALEZ, Guarionex ,  PRAMANICK, Shekhar

IPC: H01L21

CPC classification number: H01L21/76838 ,  H01L21/321 ,  H01L21/76801 ,  H01L21/76834

Abstract: A method of manufacturing a multi-level semiconductor device, which method comprises: forming a first dielectric layer (40) on a semiconductor substrate; forming a first patterned metal layer (41a-41d) having gaps therein on the first dielectric layer (40), depositing a high density plasma oxide (42) to fill the gaps by high density plasma chemical vapor deposition; performing a first heat treatment at a first temperature for a first period of time to substantially increase the grain size of the first patterned metal layer (41a-41d), performing a second heat treatment at a second temperature lower than the first temperature, for a second period of time shorter than the first period of time. Application to borderless vias.

公开(公告)号：EP0795199A1

公开(公告)日：1997-09-17

申请号：EP95942471.0

申请日：1995-11-22

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： PRAMANICK, Shekhar ,  LUNING, Scott ,  FEWKES, Jonathan

IPC: G03F7 ,  H01L21

CPC classification number: G03F7/091 ,  H01L21/0276 ,  H01L21/32137

Abstract: A structure for patterning a polysilicon layer includes a TiN layer located above an amorphous silicon (a-Si) layer forming a TiN/a-Si stack. The TiN/a-Si stack is located above the polysilicon layer. The TiN layer serves as an ARC to reduce overexposure of the photoresist used to pattern the polysilicon layer, while the a-Si layer prevents contamination of the layer below the polysilicon layer.