公开(公告)号：GB2312068A

公开(公告)日：1997-10-15

申请号：GB9707323

申请日：1997-04-10

Applicant: ALTERA CORP

Inventor： PASS CHRISTOPHER J ,  SANSBURY JAMES D ,  MADURAWE RAMINDA U ,  TURNER JOHN E ,  PATEL RAKESH H ,  WRIGHT PETER J

IPC: H03K19/177 ,  H03K19/0175

Abstract: A static, nonvolatile, and reprogrammable programmable interconnect junction cell for implementing programmable interconnect in an integrated circuit. The programmable interconnect junction (600) is programmably configured to couple or decouple a first interconnect line (210) and a second interconnect line (220). The configured state of the programmable interconnect junction is detected directly, and memory cell detection circuitry such as sense amplifiers are not needed during normal operation. Full-rail voltages may be passed from the first interconnect line and the second interconnect line. An interconnect transistor 610 and a memory transistor 635 share a floating gate 620 which is charged via a write transistor 650 and tunnel diode 660 and controlled from a line 670 via a capacitor 680. A read transistor 630 can be used for margin testing.

公开(公告)号：GB2312068B

公开(公告)日：2000-03-29

申请号：GB9707323

申请日：1997-04-10

Applicant: ALTERA CORP

Inventor： PASS CHRISTOPHER J ,  SANSBURY JAMES D ,  MADURAWE RAMINDA U ,  TURNER JOHN E ,  PATEL RAKESH H ,  WRIGHT PETER J

IPC: H03K19/177 ,  H03K19/0175

Abstract: A technique of fabricating a nonvolatile device includes forming a low doping region to aid in the reduction of substrate hot electrons. The nonvolatile device may be a floating gate device, such as a Flash, EEPROM, or EPROM memory cell. The low doping region has a lower doping concentration than that of the substrate. By reducing substrate hot electrons, this improves the reliability and longevity of the nonvolatile device.