公开(公告)号：WO2016130212A1

公开(公告)日：2016-08-18

申请号：PCT/US2015/066310

申请日：2015-12-17

Applicant: APPLE INC.

Inventor： GULATI, Manu ,  HERBECK, Gilbert H. ,  KOSUT, Alexei E. ,  JONES, Girault W. ,  MILLET, Timothy J.

IPC: G10L25/78 ,  G06F3/16 ,  G10L15/28

CPC classification number: G10L15/28 ,  G10L15/08 ,  G10L15/22 ,  G10L2015/088 ,  G10L2015/223

Abstract: In an embodiment, a system on a chip (SOC) may include one or more central processing units (CPUs), a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples and match those audio samples against a predetermined pattern. The circuit may operate according to a first clock during the time that the rest of the SOC is powered down. In response to detecting the predetermined pattern in the samples, the circuit may cause the memory controller and processors to power up. During the power up process, a second clock having one or more better characteristics than the first clock may become available. The circuit may switch to the second clock while preserving the samples, or losing at most one sample, or no more than a threshold number of samples.

Abstract translation: 在一个实施例中，芯片上的系统（SOC）可以包括一个或多个中央处理单元（CPU），存储器控制器和被配置为当SOC的其余部分断电时保持通电的电路。 该电路可以被配置为接收音频采样并将这些音频样本与预定模式相匹配。 在SOC的其余部分断电的时间内，电路可以根据第一时钟进行操作。 响应于检测样本中的预定模式，电路可以使存储器控制器和处理器加电。 在上电过程中，具有比第一时钟具有一个或多个更好特征的第二时钟可以变得可用。 电路可以切换到第二时钟，同时保持采样，或者丢失至多一个采样，或者不超过阈值数量的采样。

公开(公告)号：WO2012148753A1

公开(公告)日：2012-11-01

申请号：PCT/US2012/034071

申请日：2012-04-18

Applicant: APPLE INC. ,  CORNELIUS, William P. ,  FERRY, William O. ,  JONES, Girault W.

Inventor： CORNELIUS, William P. ,  FERRY, William O. ,  JONES, Girault W.

IPC: G06F1/12

CPC classification number: G06F1/12

Abstract: The disclosed embodiments provide a system that facilitates synchronization between a first component and a second component connected to the first component via an interface in a computer system. During an active state of the interface, the system uses a local time base in the second component to generate a local clock signal that tracks a host clock signal from the first component. Next, during an inactive state of the interface, the system uses the local time base to maintain the local clock signal at the second component. Finally, during a subsequent active state of the interface after the inactive state, the system adjusts the local clock signal to remove clock drift between the local clock signal and the host clock signal.

Abstract translation: 所公开的实施例提供了一种有助于通过计算机系统中的接口在第一组件和连接到第一组件的第二组件之间进行同步的系统。 在接口的活动状态期间，系统使用第二分量中的本地时基来产生跟踪来自第一分量的主机时钟信号的本地时钟信号。 接下来，在接口的非活动状态期间，系统使用本地时基来将本地时钟信号维持在第二分量。 最后，在处于非活动状态的接口的后续活动状态期间，系统调整本地时钟信号，以消除本地时钟信号和主机时钟信号之间的时钟漂移。

公开(公告)号：EP3257045A1

公开(公告)日：2017-12-20

申请号：EP15882269.2

申请日：2015-12-17

Applicant: Apple Inc.

Inventor： GULATI, Manu ,  HERBECK, Gilbert H. ,  KOSUT, Alexei E. ,  JONES, Girault W. ,  MILLET, Timothy J.

IPC: G10L25/78 ,  G06F3/16 ,  G10L15/28

CPC classification number: G10L15/28 ,  G10L15/08 ,  G10L15/22 ,  G10L2015/088 ,  G10L2015/223

Abstract: In an embodiment, a system on a chip (SOC) may include one or more central processing units (CPUs), a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples and match those audio samples against a predetermined pattern. The circuit may operate according to a first clock during the time that the rest of the SOC is powered down. In response to detecting the predetermined pattern in the samples, the circuit may cause the memory controller and processors to power up. During the power up process, a second clock having one or more better characteristics than the first clock may become available. The circuit may switch to the second clock while preserving the samples, or losing at most one sample, or no more than a threshold number of samples.

公开(公告)号：EP3257045B1

公开(公告)日：2019-06-05

申请号：EP15882269.2

申请日：2015-12-17

Applicant: Apple Inc.

Inventor： GULATI, Manu ,  HERBECK, Gilbert H. ,  KOSUT, Alexei E. ,  JONES, Girault W. ,  MILLET, Timothy J.

IPC: G10L15/22 ,  G10L15/08