CLOCK SWITCHING IN ALWAYS-ON COMPONENT
    1.
    发明申请
    CLOCK SWITCHING IN ALWAYS-ON COMPONENT 审中-公开
    所有组件中的时钟切换

    公开(公告)号:WO2016130212A1

    公开(公告)日:2016-08-18

    申请号:PCT/US2015/066310

    申请日:2015-12-17

    Applicant: APPLE INC.

    Abstract: In an embodiment, a system on a chip (SOC) may include one or more central processing units (CPUs), a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples and match those audio samples against a predetermined pattern. The circuit may operate according to a first clock during the time that the rest of the SOC is powered down. In response to detecting the predetermined pattern in the samples, the circuit may cause the memory controller and processors to power up. During the power up process, a second clock having one or more better characteristics than the first clock may become available. The circuit may switch to the second clock while preserving the samples, or losing at most one sample, or no more than a threshold number of samples.

    Abstract translation: 在一个实施例中,芯片上的系统(SOC)可以包括一个或多个中央处理单元(CPU),存储器控制器和被配置为当SOC的其余部分断电时保持通电的电路。 该电路可以被配置为接收音频采样并将这些音频样本与预定模式相匹配。 在SOC的其余部分断电的时间内,电路可以根据第一时钟进行操作。 响应于检测样本中的预定模式,电路可以使存储器控制器和处理器加电。 在上电过程中,具有比第一时钟具有一个或多个更好特征的第二时钟可以变得可用。 电路可以切换到第二时钟,同时保持采样,或者丢失至多一个采样,或者不超过阈值数量的采样。

    COORDINATING COMPLEMENTARY NOTIFICATIONS ACROSS RELATED COMPUTING DEVICES CONNECTED TO A WIRELESS CHARGING APPARATUS

    公开(公告)号:WO2018226258A1

    公开(公告)日:2018-12-13

    申请号:PCT/US2018/013500

    申请日:2018-01-12

    Applicant: APPLE INC.

    Abstract: The embodiments set forth a technique for coordinating notifications across computing devices placed onto a wireless charging apparatus. According to some embodiments, the technique can involve the wireless charging apparatus (1) receiving, from a first computing device, first information that includes (i) a first unique identifier (ID) associated with the first computing device, and (ii) one or more unique IDs that are each associated with a respective auxiliary computing device known to the first computing device. Subsequently, the wireless charging apparatus can receive, from a second computing device, second information that at least includes a second unique ID associated with the second computing device. Finally, the wireless charging apparatus can, in response to determining that the second unique ID is included in the one or more unique IDs, and cause both the first and second computing devices to display respective notifications in a coordinated manner.

    STATE OF CHARGE INFORMATION FOR A WIRELESS POWER TRANSMITTING DEVICE

    公开(公告)号:WO2022005853A1

    公开(公告)日:2022-01-06

    申请号:PCT/US2021/038735

    申请日:2021-06-23

    Applicant: APPLE INC.

    Abstract: A wireless power system may include power transmitting devices, power receiving devices, and power transmitting and receiving devices. During a configuration phase (e.g., when placed adjacent to another device), a battery-powered transmitting device may transmit information to the additional device that identifies a presence of the battery in the transmitting device. The battery-powered transmitting device may periodically report its state of charge to a power receiving device using in-band communication. The battery- powered transmitting device may report its state of charge before a power transfer phase (e.g., in the configuration phase) or during the power transfer phase. The battery-powered transmitting device may report its state of charge to the power receiving device in response to a state of charge query from the power receiving device. The power receiving device may display the state of charge of the battery of the power transmitting device.

    CLOCK SWITCHING IN ALWAYS-ON COMPONENT
    5.
    发明公开
    CLOCK SWITCHING IN ALWAYS-ON COMPONENT 审中-公开
    时钟切换始终开启组件

    公开(公告)号:EP3257045A1

    公开(公告)日:2017-12-20

    申请号:EP15882269.2

    申请日:2015-12-17

    Applicant: Apple Inc.

    Abstract: In an embodiment, a system on a chip (SOC) may include one or more central processing units (CPUs), a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples and match those audio samples against a predetermined pattern. The circuit may operate according to a first clock during the time that the rest of the SOC is powered down. In response to detecting the predetermined pattern in the samples, the circuit may cause the memory controller and processors to power up. During the power up process, a second clock having one or more better characteristics than the first clock may become available. The circuit may switch to the second clock while preserving the samples, or losing at most one sample, or no more than a threshold number of samples.

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