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    SEALING POROUS STRUCTURES
    1.
    发明申请
    SEALING POROUS STRUCTURES 审中-公开
    密封多孔结构

    公开(公告)号：WO2004049432A2

    公开(公告)日：2004-06-10

    申请号：PCT/US2003/040061

    申请日：2003-11-21

    Applicant: ASM AMERICA, INC. ,  ASM INTERNATIONAL N.V.

    Inventor： RAAIJMAKERS, Ivo ,  SOININEN, Pekka, J. ,  GRANNEMAN, Ernst ,  HAUKKA, Suvi ,  ELERS, Kai-Erik ,  TUOMINEN, Marco ,  SPREY, Hessel ,  TERHORST, Herbert ,  HENDRIKS, Menso

    IPC: H01L23/00

    CPC classification number: H01L21/76843 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/76844 ,  H01L21/76864 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits, and particularly of openings formed in porous materials. Trenches and contact vias are formed in insulating layers. The pores on the sidewalls of the trenches and vias are blocked, and then the structure is exposed to alternating chemistries to form monolayers of a desired lining material. In exemplary process flows chemical or physical vapor deposition (CVD or PVD) of a sealing layer blocks the pores due to imperfect conformality. An alternating process can also be arranged by selection of pulse separation and/or pulse duration to achieve reduced conformality relative to a self-saturating, self-limiting atomic layer deposition (ALD) process. In still another arrangement, layers with anisotropic pore structures can be sealed by selectively melting upper surfaces. Blocking is followed by a self-limiting, self-saturating atomic layer deposition (ALD) reactions without significantly filling the pores.

    Abstract translation: 提供了用于集成电路中的双镶嵌结构的保形衬里的方法和结构，并且尤其提供了在多孔材料中形成的开口。 沟槽和接触过孔在绝缘层中形成。 沟槽和通孔侧壁上的孔被阻塞，然后该结构暴露于交替化学反应以形成所需衬里材料的单层。 在示例性工艺流程中，由于不完全的共形性，密封层的化学或物理气相沉积（CVD或PVD）阻塞孔隙。 也可以通过选择脉冲间隔和/或脉冲持续时间来安排交替工艺，以相对于自饱和自限原子层沉积（ALD）工艺实现降低的共形性。 在又一种布置中，具有各向异性孔结构的层可通过选择性地熔化上表面来密封。 封闭之后是自我限制的自饱和原子层沉积（ALD）反应，没有显着填充孔。

    APPARATUS AND METHOD FOR HIGH-THROUGHPUT ATOMIC LAYER DEPOSITION
    2.
    发明申请
    APPARATUS AND METHOD FOR HIGH-THROUGHPUT ATOMIC LAYER DEPOSITION 审中-公开
    用于高通量原子层沉积的装置和方法

    公开(公告)号：WO2009142487A1

    公开(公告)日：2009-11-26

    申请号：PCT/NL2009/050270

    申请日：2009-05-20

    Applicant: ASM INTERNATIONAL N.V. ,  GRANNEMAN, Ernst H.A. ,  TERHORST, Herbert

    Inventor： GRANNEMAN, Ernst H.A. ,  TERHORST, Herbert

    IPC: C23C16/54 ,  C23C16/455

    CPC classification number: C23C16/45544 ,  C23C16/45551 ,  C23C16/458 ,  C23C16/54 ,  C30B25/14 ,  C30B29/20 ,  C30B35/005 ,  H01L21/67784

    Abstract: Atomic layer deposition apparatus for depositing a film in a continuous fashion. The apparatus includes a downwardly sloping process tunnel, extending in a transport direction and bounded by at least two tunnel walls. Both walls are provided with a plurality of gas injection channels, whereby the gas injection channels in at least one of the walls, viewed in the transport direction, are connected successively to a first precursor gas source, a purge gas source, a second precursor gas source and a purge gas source respectively, so as to create a series of tunnel segments that -in use - comprise successive zones containing a first precursor gas, a purge gas, a second precursor gas and a purge gas, respectively. The downward slope of the process tunnel enables gravity to drive the floatingly supported substrates through the successive segments, causing the atomic layer deposition of a film onto the substrates.

    Abstract translation: 用于以连续方式沉积薄膜的原子层沉积装置。 该装置包括向下倾斜的过程隧道，其在输送方向上延伸并且由至少两个隧道壁限定。 两个壁都设置有多个气体注入通道，由此在传送方向上观察的至少一个壁中的气体注入通道连续地连接到第一前体气体源，吹扫气体源，第二前体气体 源和吹扫气体源，以便产生一系列隧道段，其使用 - 分别包括含有第一前体气体，吹扫气体，第二前体气体和吹扫气体的连续区域。 过程隧道的向下倾斜使得重力能够通过连续段驱动浮动支撑的衬底，导致原子层将膜沉积到衬底上。

    SEMICONDUCTOR PROCESSING REACTOR AND COMPONENTS THEREOF
    4.
    发明申请
    SEMICONDUCTOR PROCESSING REACTOR AND COMPONENTS THEREOF 审中-公开

    公开(公告)号：WO2010118051A3

    公开(公告)日：2010-10-14

    申请号：PCT/US2010/030126

    申请日：2010-04-06

    Applicant: ASM AMERICA, INC. ,  SHERO, Eric ,  VERGHESE, Mohith ,  WHITE, Carl ,  TERHORST, Herbert ,  MAURICE, Dan

    Inventor： SHERO, Eric ,  VERGHESE, Mohith ,  WHITE, Carl ,  TERHORST, Herbert ,  MAURICE, Dan

    IPC: C23C16/455

    Abstract: A reactor having a housing that encloses a gas delivery system (14) operatively connected to a reaction chamber (16) and an exhaust assembly (18). The gas delivery system includes a plurality of gas lines for providing at least one process gas to the reaction chamber. The gas delivery system further includes a mixer (20) for receiving the at least one process gas. The mixer is operatively connected to a diffuser (22) that is configured to diffuse process gases. The diffuser is attached directly to an upper surface (24) of the reaction chamber, thereby forming a diffuser volume therebetween. The diffuser includes at least one distribution surface that is configured to provide a flow restriction to the process gases as they pass through the diffuser volume before being introduced into the reaction chamber. The reaction chamber defines a reaction space in which a semiconductor substrate is disposed for processing. The exhaust assembly is operatively connected to the reaction chamber for withdrawing unreacted process gases and effluent from the reaction space.

    METHOD AND APPARATUS FOR THE TREATMENT OF SUBSTRATES
    6.
    发明公开
    METHOD AND APPARATUS FOR THE TREATMENT OF SUBSTRATES 审中-公开
    方法处理基板

    公开(公告)号：EP1243020A1

    公开(公告)日：2002-09-25

    申请号：EP00991365.8

    申请日：2000-12-28

    Applicant: ASM INTERNATIONAL N.V.

    Inventor： GRANNEMAN, Ernst, Hendrik, August ,  KUZNETSOV, Vladimir Ivanovich ,  STORM, Arjen, Benjamin ,  TERHORST, Herbert

    IPC: H01L21/00

    CPC classification number: H01L21/67109 ,  H01L21/6838

    Abstract: Method and apparatus for the thermal treatment of semiconductor substrates such as a wafer. Such a wafer is brought into a heat treatment apparatus wherein the heat treatment apparatus comprises two substantially flat parts parallel to the introduction position of the wafer, between which the wafer is taken in, wherein the first part is heated to a first high temperature and the second part is cooled with the help of cooling means and is at a second temperature lower than 70 °C. By controlling the heat conductivity between the wafer and at least one of the parts, the temperature of the wafer can be influenced to such an extent that during a certain period, the wafer takes on a temperature that is comparatively closer to the first, high temperature and then takes on a temperature which is comparatively closer to the second low temperature.

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