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    Model-based scanner tuning systems and methods
    2.
    发明授权
    Model-based scanner tuning systems and methods 有权

    公开(公告)号：US10569469B2

    公开(公告)日：2020-02-25

    申请号：US14525704

    申请日：2014-10-28

    Applicant: ASML NETHERLANDS B.V.

    Inventor： Yu Cao ,  Wenjin Shao ,  Ronaldus Johannes Gijsbertus Goossens ,  Jun Ye ,  James Patrick Koonmen

    IPC: G06F17/50 ,  G03F7/00 ,  B29C64/386 ,  G03F7/20

    Abstract: Systems and methods for tuning photolithographic processes are described. A model of a target scanner is maintained defining sensitivity of the target scanner with reference to a set of tunable parameters. A differential model represents deviations of the target scanner from the reference. The target scanner may be tuned based on the settings of the reference scanner and the differential model. Performance of a family of related scanners may be characterized relative to the performance of a reference scanner. Differential models may include information such as parametric offsets and other differences that may be used to simulate the difference in imaging behavior.

    Computational wafer inspection
    7.
    发明授权
    Computational wafer inspection 有权
    计算晶圆检查

    公开(公告)号：US09507907B2

    公开(公告)日：2016-11-29

    申请号：US14730993

    申请日：2015-06-04

    Applicant: ASML NETHERLANDS B.V.

    Inventor： Christophe David Fouquet ,  Bernardo Kastrup ,  Arie Jeffrey Den Boef ,  Johannes Catharinus Hubertus Mulkens ,  James Benedict Kavanagh ,  James Patrick Koonmen ,  Neal Patrick Callan

    IPC: G06F17/50 ,  H01L21/66 ,  G03F7/20

    CPC classification number: G06F17/5081 ,  G03F7/705 ,  G03F7/70525 ,  G03F7/7065 ,  G06F17/5009 ,  G06N7/005 ,  H01L22/20

    Abstract: Disclosed herein is a computer-implemented defect prediction method for a device manufacturing process involving processing a portion of a design layout onto a substrate, the method comprising: identifying a hot spot from the portion of the design layout; determining a range of values of a processing parameter of the device manufacturing process for the hot spot, wherein when the processing parameter has a value outside the range, a defect is produced from the hot spot with the device manufacturing process; determining an actual value of the processing parameter; and determining or predicting, using the actual value, an existence, a probability of existence, a characteristic, or a combination selected therefrom, of a defect produced from the hot spot with the device manufacturing process.

    Abstract translation: 这里公开了一种用于设备制造过程的计算机实现的缺陷预测方法，该方法涉及将设计布局的一部分处理到衬底上，所述方法包括：从所述设计布局的所述部分中识别热点; 确定所述热点的装置制造过程的处理参数的值的范围，其中当所述处理参数具有超出所述范围的值时，通过所述装置制造过程从所述热点产生缺陷; 确定处理参数的实际值; 并且使用实际值确定或预测由设备制造过程产生的缺陷产生的缺陷的存在，存在概率，特征或其选择的组合。

    Computational process control
    9.
    发明授权
    Computational process control 有权

    公开(公告)号：US10007192B2

    公开(公告)日：2018-06-26

    申请号：US14507553

    申请日：2014-10-06

    Applicant: ASML NETHERLANDS B.V.

    Inventor： Jun Ye ,  Yu Cao ,  James Patrick Koonmen

    IPC: G06F17/50 ,  G03F7/20 ,  G05B13/04 ,  G03F9/00 ,  B29C64/386

    CPC classification number: G03F7/70525 ,  B29C64/386 ,  G03F9/7096 ,  G05B13/04

    Abstract: The present invention provides a number of innovations in the area of computational process control (CPC). CPC offers unique diagnostic capability during chip manufacturing cycle by analyzing temporal drift of a lithography apparatus/ process, and provides a solution towards achieving performance stability of the lithography apparatus/process. Embodiments of the present invention enable optimized process windows and higher yields by keeping performance of a lithography apparatus and/or parameters of a lithography process substantially close to a pre-defined baseline condition. This is done by comparing the measured temporal drift to a baseline performance using a lithography process simulation model. Once in manufacturing, CPC optimizes a scanner for specific patterns or reticles by leveraging wafer metrology techniques and feedback loop, and monitors and controls, among other things, overlay and/or CD uniformity (CDU) performance over time to continuously maintain the system close to the baseline condition.

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