Computational wafer inspection
    5.
    发明授权
    Computational wafer inspection 有权
    计算晶圆检查

    公开(公告)号:US09507907B2

    公开(公告)日:2016-11-29

    申请号:US14730993

    申请日:2015-06-04

    Abstract: Disclosed herein is a computer-implemented defect prediction method for a device manufacturing process involving processing a portion of a design layout onto a substrate, the method comprising: identifying a hot spot from the portion of the design layout; determining a range of values of a processing parameter of the device manufacturing process for the hot spot, wherein when the processing parameter has a value outside the range, a defect is produced from the hot spot with the device manufacturing process; determining an actual value of the processing parameter; and determining or predicting, using the actual value, an existence, a probability of existence, a characteristic, or a combination selected therefrom, of a defect produced from the hot spot with the device manufacturing process.

    Abstract translation: 这里公开了一种用于设备制造过程的计算机实现的缺陷预测方法,该方法涉及将设计布局的一部分处理到衬底上,所述方法包括:从所述设计布局的所述部分中识别热点; 确定所述热点的装置制造过程的处理参数的值的范围,其中当所述处理参数具有超出所述范围的值时,通过所述装置制造过程从所述热点产生缺陷; 确定处理参数的实际值; 并且使用实际值确定或预测由设备制造过程产生的缺陷产生的缺陷的存在,存在概率,特征或其选择的组合。

Patent Agency Ranking