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    Rf integrated circuit layout
    1.
    发明专利
    Rf integrated circuit layout 未知

    公开(公告)号：AU6151101A

    公开(公告)日：2001-11-26

    申请号：AU6151101

    申请日：2001-05-10

    Applicant: ATHEROS COMM INC

    Inventor： YUE CHIK PATRICK ,  ZARGARI MASOUD ,  SU DAVID

    IPC: H01L23/552 ,  H01L23/66

    Abstract: A radio-frequency (RF) integrated circuit is described. In one embodiment, the IC comprises multiple metal layers forming multiple transistors on a non-epitaxial substrate. The transistors are step and mirror symmetric. Also, the RF signal lines are on a top metal layer above all other metal layers and the power and ground planes are on a bottom metal layer below all other metal layers. The top and bottom metal layers are separated by a shield that extends beyond the RF signal lines by a distance that is at least the same distance that the shield is away from the RF lines. Low frequency signals are on signal lines below the top metal layer.

    METHOD AND APPARATUS FOR ELIMINATING THE EFFECTS OF FREQUENCY OFFSETS IN A DIGITAL COMMUNICATION SYSTEM
    2.
    发明专利
    METHOD AND APPARATUS FOR ELIMINATING THE EFFECTS OF FREQUENCY OFFSETS IN A DIGITAL COMMUNICATION SYSTEM 未知

    公开(公告)号：CA2386885A1

    公开(公告)日：2001-04-19

    申请号：CA2386885

    申请日：2000-10-11

    Applicant: ATHEROS COMM INC

    Inventor： SU DAVID ,  MENG TERESA H ,  ZARGARI MASOUD

    IPC: H04L7/00 ,  H03J7/04 ,  H04L27/00 ,  H04L27/233 ,  H04J3/06

    Abstract: The present invention aims at eliminating the effects of frequency offsets between two transceivers by adjusting frequencies used during transmission. In this invention, methods for correcting the carrier frequency and the samplin g frequency during transmission are provided, including both digital and analo g implementations of such methods. The receiver determines the relative frequency offset between the transmitter and the receiver, and uses this information to correct this offset when the receiver transmits its data to t he original transmitter in the return path, so that the signal received by the original transmitter is in sampling and carrier frequency lock with the original transmitter's local frequency reference.

    METHOD AND APPARATUS FOR ELIMINATING THE EFFECTS OF FREQUENCY OFFSETS IN A DIGITAL COMMUNICATION SYSTEM
    3.
    发明申请
    METHOD AND APPARATUS FOR ELIMINATING THE EFFECTS OF FREQUENCY OFFSETS IN A DIGITAL COMMUNICATION SYSTEM 审中-公开
    用于消除数字通信系统中频偏的影响的方法和设备

    公开(公告)号：WO0128150A3

    公开(公告)日：2001-09-27

    申请号：PCT/US0041164

    申请日：2000-10-11

    Applicant: ATHEROS COMM INC

    Inventor： MENG TERESA H ,  SU DAVID ,  SARGARI MASOUD

    IPC: H04L7/00 ,  H03J7/04 ,  H04L27/00 ,  H04L27/233 ,  H04J3/06

    CPC classification number: H04L27/148 ,  H03J7/04 ,  H04B1/38 ,  H04L7/033 ,  H04L27/0014 ,  H04L2027/0022

    Abstract: The present invention aims at eliminating the effects of frequency offsets between two transceivers by adjusting frequencies used during transmission. In this invention, methods for correcting the carrier frequency and the sampling frequency during transmission are provided, including both digital and analog implementations of such methods. The receiver determines the relative frequency offset between the transmitter and the receiver, and uses this information to correct this offset when the receiver transmits its data to the original transmitter in the return path, so that the signal received by the original transmitter is in sampling and carrier frequency lock with the original transmitter's local frequency reference.

    Abstract translation: 本发明旨在通过调整在传输期间使用的频率来消除两个收发机之间的频率偏移的影响。 在本发明中，提供了用于在传输期间校正载波频率和采样频率的方法，包括这种方法的数字和模拟实现。 接收器确定发射器和接收器之间的相对频率偏移，并且当接收器将其数据传输到返回路径中的原始发射器时使用该信息来校正该偏移，使得原始发射器接收到的信号处于采样中并且 载波频率锁定与原始发射机的本地频率参考。

    METHOD AND APPARATUS FOR ELIMINATING THE EFFECTS OF FREQUENCY OFFSETS IN A DIGITAL COMMUNICATION SYSTEM
    4.
    发明专利
    METHOD AND APPARATUS FOR ELIMINATING THE EFFECTS OF FREQUENCY OFFSETS IN A DIGITAL COMMUNICATION SYSTEM 未知

    公开(公告)号：CA2386885C

    公开(公告)日：2013-12-03

    申请号：CA2386885

    申请日：2000-10-11

    Applicant: ATHEROS COMM INC

    Inventor： MENG TERESA H ,  SU DAVID ,  ZARGARI MASOUD

    IPC: H04L7/00 ,  H04L27/233 ,  H03J7/04 ,  H04J3/06 ,  H04L27/00

    Abstract: The present invention aims at eliminating the effects of frequency offsets between two transceivers by adjusting frequencies used during transmission. In this invention, methods for correcting the carrier frequency and the sampling frequency during transmission are provided, including both digital and analog implementations of such methods. The receiver determines the relative frequency offset between the transmitter and the receiver, and uses this information to correct this offset when the receiver transmits its data to the original transmitter in the return path, so that the signal received by the original transmitter is in sampling and carrier frequency lock with the original transmitter's local frequency reference.

    5.
    发明专利
    未知

    公开(公告)号：AT422109T

    公开(公告)日：2009-02-15

    申请号：AT03736521

    申请日：2003-04-29

    Applicant: ATHEROS COMM INC

    Inventor： JEN HUNG-MIN ,  SU DAVID

    IPC: H03F3/45 ,  H03G1/00 ,  H03G3/28

    Abstract: The present invention provides a variable gain amplifier with a plurality of gain stages in which each of the gain stages is implemented using a circuit that implements a neutralization approach. This variable gain amplifier provides stable operation characteristics as different gain stages within the variable gain amplifier are turned on and off. This variable gain amplifier also increases linearity across the entire operating range. Additionally, the variable gain amplifier of the present invention provides a constant input impedance through different gain settings. Further, the present invention provides a variable gain amplifier in which each of the various gain stages therein maximize the available voltage swing. Finally, this variable gain amplifier improves common-mode rejection performance and attenuates unwanted harmonics.

    Cmos transceiver having an integrated power amplifier
    6.
    发明专利
    Cmos transceiver having an integrated power amplifier 未知

    公开(公告)号：AU9088601A

    公开(公告)日：2002-03-26

    申请号：AU9088601

    申请日：2001-09-14

    Applicant: ATHEROS COMM INC

    Inventor： WEBER DAVID J ,  YUE PATRICK ,  SU DAVID

    IPC: H01L23/66 ,  H01L27/088 ,  H03F1/22 ,  H03F1/52 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45 ,  H04B1/04

    Abstract: The present invention provides a breakdown resistant transistor structure for amplifying communication signals. This structure includes a first NMOS transistor having a source connected to ground and a first gate for receiving the input radio frequency signal. The first gate is disposed above a first insulator and the first NMOS transistor having a first transconductance and a first breakdown voltage associated therewith. Also included is a second NMOS transistor having a source connected to the drain of the first NMOS transistor, a gate connected to the reference DC voltage, and a drain that provides the output for the amplified radio signal, the load being disposed between the reference DC voltage and the drain of the second NMOS transistor. The second gate is disposed above a second insulator, the second NMOS transistor has a second transconductance and a second breakdown voltage associated therewith, and the second insulator may be thicker than the first insulator. This results in the first transconductance being greater than the second transconductance, and the second breakdown voltage being greater than the first breakdown voltage.

    RF INTEGRATED CIRCUIT LAYOUT
    9.
    发明申请
    RF INTEGRATED CIRCUIT LAYOUT 审中-公开
    RF集成电路布局

    公开(公告)号：WO0188956A3

    公开(公告)日：2002-03-28

    申请号：PCT/US0115399

    申请日：2001-05-10

    Applicant: ATHEROS COMM INC ,  YUE CHIK PATRICK ,  ZARGARI MASOUD ,  SU DAVID

    Inventor： YUE CHIK PATRICK ,  ZARGARI MASOUD ,  SU DAVID

    IPC: H01L23/552 ,  H01L23/66 ,  H01L27/095 ,  H01L23/48 ,  H01L23/58 ,  H01L27/10 ,  H01L29/76

    CPC classification number: H01L23/66 ,  H01L23/552 ,  H01L2223/6688 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A radio-frequency (RF) integrated circuit is described. In one embodiment, the IC comprises multiple metal layers forming multiple transistors on a non-epitaxial substrate. The transistors are step and mirror symmetric. Also, the RF signal lines are on a top metal layer above all other metal layers and the power and ground planes are on a bottom metal layer below all other metal layers. The top and bottom metal layers are separated by a shield that extends beyond the RF signal lines by a distance that is at least the same distance that the shield is away from the RF lines. Low frequency signals are on signal lines below the top metal layer.

    Abstract translation: 描述了射频（RF）集成电路。 在一个实施例中，IC包括在非外延衬底上形成多个晶体管的多个金属层。 晶体管是阶梯式和镜面对称的。 此外，RF信号线位于所有其它金属层上的顶部金属层上，并且电源和接地平面位于所有其它金属层下方的底部金属层上。 顶部和底部金属层被屏蔽层隔开，该屏蔽件延伸超过RF信号线一段至少与屏蔽层远离RF线路的距离至少相等的距离。 低频信号位于顶部金属层下方的信号线上。

    Dual frequency band wireless lan
    10.
    发明专利
    Dual frequency band wireless lan 未知

    公开(公告)号：AU2003234449A8

    公开(公告)日：2003-11-17

    申请号：AU2003234449

    申请日：2003-05-02

    Applicant: ATHEROS COMM INC

    Inventor： SHOR ARIE ,  TERROVITIS MANOLIS ,  MCFARLAND WILLIAM J ,  THOMSON JOHN ,  ZARAGARI MASOUD ,  ONEDERA KEITH ,  SU DAVID

    IPC: H03H7/01 ,  H03H7/48 ,  H04B7/06 ,  H04B7/08 ,  H04L12/28

    Abstract: A dual band radio is constructed using a primary and secondary transceiver. The primary transceiver is a complete radio that is operational in a stand alone configuration. The secondary transceiver is a not a complete radio and is configured to re-use components such as fine gain control and fine frequency stepping of the primary transceiver to produce operational frequencies of the secondary transceiver. The primary transceiver acts like an intermediate frequency device for the secondary transceiver. Switches are utilized to divert signals to/from the primary transceiver from/to the secondary transceiver. The switches are also configured to act as gain control devices. Antennas are selected using either wideband or narrowband antenna switches that are configured as a diode bridge having high impedance at operational frequencies on control lines that bias the diodes.

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