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公开(公告)号：US20180144870A1
公开(公告)日：2018-05-24
申请号：US15873855
申请日：2018-01-17
Applicant: Apple Inc.
Inventor： Gang Ning , Shawn X. Arnold
Abstract: This application relates to multi-layered ceramic capacitors (MLCC) that can be surface mounted, include multiple terminals, and handle multiple voltages. The MLCC can include electrode and dielectric layers that are stacked in parallel to a printed circuit board (PCB) on which the MLCC can be attached. A set of primary conductive pads can be formed on the bottom of the MLCC in order to create a conductive interface between the PCB and the MLCC. Secondary conductive pads are formed on the side of the MLCC, and can extend perpendicular to the PCB. The secondary conductive pads are created by stacking internal electrode plates together and connecting them electrically and mechanically to each another. This arrangement provides for multiple voltages and electrical connections at the MLCC while reducing reverse piezoelectric and/or electro-striction noise.
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公开(公告)号：US09715964B2
公开(公告)日：2017-07-25
申请号：US14500786
申请日：2014-09-29
Applicant: Apple Inc.
Inventor： Gang Ning , Pradeep Vengavasi , Linda Y. Dunn , Yonas A. Hartanto , Shawn X. Arnold
Abstract: This disclosure describes methods and systems for minimizing electromagnetic interference (EMI) noise emanating from a ceramic capacitor. The ceramic capacitor may include several terminations are on a bottom portion of the capacitor. The capacitor may be designed to include several capacitors formed from electrode layers. The capacitor may include a conductive coating on an outer peripheral portion. The coating may include conductive materials such as Cu, Ni, Ag, and/or graphite. Alternatively, some regions of the capacitor may include electrode layers built into the capacitor that are not associated with capacitors. In this manner, the ceramic capacitor may be free of the conductive coating to locations proximate to the described electrode layers not associated with capacitors. The conductive coating can act as an electromagnetic shielding to prevent the EMI noise from emanating outside the electromagnetic shielding. Also, the conductive coating can be electrically grounded (e.g., to printed circuit board) via terminals.
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公开(公告)号：US09330943B2
公开(公告)日：2016-05-03
申请号：US13902727
申请日：2013-05-24
Applicant: Apple Inc.
Inventor： Shawn X. Arnold
IPC: H05K1/00 , H01L21/52 , H01L23/00 , H05K1/18 , H01L21/48 , H05K1/02 , H01L23/538 , H01L23/24 , H05K3/00 , H05K3/46
CPC classification number: H01L21/52 , H01L21/4803 , H01L23/24 , H01L23/5389 , H01L23/562 , H01L24/00 , H01L2924/12042 , H05K1/0271 , H05K1/185 , H05K3/0035 , H05K3/4652 , H05K2203/1469 , H01L2924/00
Abstract: A method for mounting and embedding a thinned integrated circuit within a substrate is provided. In one embodiment, the thinned integrated circuit can receive one or more biasing substrate layers on a first surface of the thinned integrated circuit. When the thinned integrated circuit is embedded within a supporting substrate, such as a printed circuit board, the biasing substrate layers can position the thinned integrated circuit toward a centerline of the printed circuit board. Positioning the thinned integrated circuit toward the centerline can increase the resistance to breakage.
Abstract translation: 提供了一种在基板内安装和嵌入薄型集成电路的方法。 在一个实施例中，减薄的集成电路可以在稀疏集成电路的第一表面上接收一个或多个偏置衬底层。 当薄化的集成电路嵌入诸如印刷电路板的支撑衬底内时，偏压衬底层可以将薄化的集成电路定位到印刷电路板的中心线。 将减薄的集成电路朝向中心线定位可以增加抗断裂性。
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公开(公告)号：US20150364253A1
公开(公告)日：2015-12-17
申请号：US14500794
申请日：2014-09-29
Applicant: Apple Inc.
Inventor： Shawn X. Arnold , Dennis R. Pyper , Gang Ning , Meng Chi Lee , Sascha Tietz , Sury N. Darbha , Zhong-Qing Gong
CPC classification number: H01G2/065 , G10K11/16 , H01G4/232 , H01G4/30 , H05K1/111 , H05K3/3442 , H05K2201/094 , H05K2201/09427 , H05K2201/10015 , H05K2201/2045 , Y02P70/611 , Y02P70/613
Abstract: Apparatus and methods are described for coupling a circuit component having piezoelectric properties, such as a ceramic capacitor, to a printed circuit board (PCB) by forming a first solder heel fillet and a second solder heel fillet that fixedly couple the circuit component to the PCB, where the first and second solder heel fillets have a height z that is less than a height h of the circuit component to reduce acoustic noise at the PCB caused by coupling the circuit component to the PCB. In various configurations, the first solder heel fillet and the second solder heel fillet can each fixedly coupled to: a bottom surface of the circuit component, a top surface of the PCB at a first solder pad and a second solder pad thereof, and a lower portion of each of a multiple side surfaces of the circuit component.
Abstract translation: 描述了用于将具有压电特性的电路部件（例如陶瓷电容器）耦合到印刷电路板（PCB）的装置和方法，该方法通过形成将电路部件固定地耦合到PCB的第一焊脚跟内圆角和第二焊脚跟内圆角 其中第一和第二焊脚后视角具有低于电路部件的高度h的高度z，以减小由于将电路部件耦合到PCB而导致的PCB处的声学噪声。 在各种配置中，第一焊脚跟内圆角和第二焊脚跟内圆角可以各自固定地连接到：电路部件的底表面，PCB的顶表面处于第一焊盘和第二焊垫，下部 电路部件的多个侧表面中的每一个的部分。
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公开(公告)号：US08736080B2
公开(公告)日：2014-05-27
申请号：US13632145
申请日：2012-09-30
Applicant: Apple Inc.
Inventor： Shawn X. Arnold , Terry L. Gilton , Matthew E. Last
IPC: H01L23/48
CPC classification number: H05K1/183 , G06F1/16 , G06F3/041 , G06K9/00053 , H01L23/24 , H01L24/11 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/85 , H01L29/0657 , H01L2224/43 , H01L2224/45015 , H01L2224/451 , H01L2224/48091 , H01L2224/48137 , H01L2224/48479 , H01L2224/85 , H01L2224/85051 , H01L2224/85186 , H01L2924/00 , H01L2924/00014 , H01L2924/10155 , H01L2924/10253 , H05K1/111 , H05K2201/09036 , H05K2201/10151 , H01L2924/20752 , H01L2224/48471 , H01L2224/4554
Abstract: A sensor array package can include a sensor disposed on a first side of a substrate. Signal trenches can be formed along the edges of the substrate and a conductive layer can be deposited in the signal trench and can couple to sensor signal pads. Bond wires can be attached to the conductive layers and can be arranged to be below a surface plane of the sensor. The sensor array package can be embedded in a printed circuit board enabling the bond wires to terminate at other conductors within the printed circuit board.
Abstract translation: 传感器阵列封装可以包括设置在基板的第一侧上的传感器。 信号沟槽可以沿着衬底的边缘形成，并且导电层可以沉积在信号沟槽中并且可以耦合到传感器信号焊盘。 接合线可以附接到导电层并且可以被布置成在传感器的表面下方。 传感器阵列封装可嵌入印刷电路板中，使得接合线能够终止于印刷电路板内的其它导体。
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Patent Agency Ranking
公开(公告)号：US20190075653A1
公开(公告)日：2019-03-07
申请号：US15696102
申请日：2017-09-05
Applicant: Apple Inc.
Inventor： Mark J. Beesley , Albert A. Onderick, II , Anne M. Mason , Craig A. Gammel , Shawn X. Arnold
CPC classification number: H05K1/112 , H05K1/11 , H05K1/114 , H05K1/115 , H05K1/14 , H05K3/0017 , H05K3/0047 , H05K3/3436 , H05K3/425 , H05K3/429 , H05K3/4602 , H05K2201/09227 , H05K2201/0959 , H05K2201/09645 , H05K2201/10734
Abstract: Printed circuit boards having an increased density of vertical interconnect paths, as well as methods for their manufacture. One example may provide a printed circuit board having an increased density of vertical interconnect paths by forming a plurality of segmented vias. The segmented vias may extend through interior layers of the printed circuit board. The segmented vias may be formed of portions of vias in the interior layers of the printed circuit board. An area between three or more segmented vias may be filled with resin or other material or materials.
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公开(公告)号：US20180228026A1
公开(公告)日：2018-08-09
申请号：US15942970
申请日：2018-04-02
Applicant: Apple Inc.
Inventor： Sunil M. Akre , Shawn X. Arnold
CPC classification number: H05K1/141 , H05K1/144 , H05K1/165 , H05K1/185 , H05K2201/086 , Y10T29/4913
Abstract: Embedded PCB (printed circuit board) is used for the packaging and assembly of a low profile power conversion system module that can be employed in space constrained environment of small computer/electronic systems. The low profile power conversion system module may include an embedded PCB, a power silicon device embedded within the PCB, a magnetic component which is either embedded within the PCB or disposed on the PCB, or input/output terminals disposed on the side of the embedded PCB. The embedded PCB and the magnetic component may be thin planar shaped to save vertical space. The low profile power conversion system module can be placed inside a cavity formed in the system PCB to save even more vertical space.
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公开(公告)号：US09936579B2
公开(公告)日：2018-04-03
申请号：US14163852
申请日：2014-01-24
Applicant: Apple Inc.
Inventor： Sunil M. Akre , Shawn X. Arnold
CPC classification number: H05K1/141 , H05K1/144 , H05K1/165 , H05K1/185 , H05K2201/086 , Y10T29/4913
Abstract: Embedded PCB (printed circuit board) is used for the packaging and assembly of a low profile power conversion system module that can be employed in space constrained environment of small computer/electronic systems. The low profile power conversion system module includes an embedded PCB, a power silicon device embedded within the PCB, a magnetic component which is either embedded within the PCB or disposed on the PCB, and input/output terminals disposed on the side of the embedded PCB. The embedded PCB and the magnetic component are thin planar shaped to save vertical space. The low profile power conversion system module can be placed inside a cavity formed in the system PCB to save even more vertical space.
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公开(公告)号：US09805867B2
公开(公告)日：2017-10-31
申请号：US13957342
申请日：2013-08-01
Applicant: Apple Inc.
Inventor： Shawn X. Arnold , Jeffrey M. Thoma , Connor R. Duke , Yanchu Xu , Nelson J. Kottke
IPC: H01G4/005 , H01G4/01 , H05K1/18 , H05K13/04 , B23K26/22 , H05K3/34 , H01G4/40 , H01G2/06 , H01G2/10 , H01G4/224 , H01G4/228
CPC classification number: H01G4/01 , B23K26/22 , H01G2/06 , H01G2/10 , H01G4/224 , H01G4/228 , H01G4/40 , H05K1/181 , H05K3/3442 , H05K13/0465 , H05K2201/10015 , H05K2201/10636 , H05K2201/10962 , H05K2201/2045 , Y02P70/611 , Y02P70/613
Abstract: The described embodiments relate generally to printed circuit boards (PCBs) including a capacitor and more specifically to designs for mechanically isolating the capacitor from the PCB to reduce an acoustic noise produced when the capacitor imparts a piezoelectric force on the PCB. Conductive features can be mechanically and electrically coupled to electrodes located on two ends of the capacitor. The conductive features can be placed in corners where the amplitude of vibrations created by the piezoelectric forces is relatively small. The conductive features can then be soldered to a land pattern on the PCB to form a mechanical and electrical connection while reducing an amount of vibrational energy transferred from the capacitor to the PCB.
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公开(公告)号：US20170263561A1
公开(公告)日：2017-09-14
申请号：US15246481
申请日：2016-08-24
Applicant: Apple Inc.
Inventor： Anne M. Mason , Peter J. Johnston , Christine A. Laliberte , Dominic P. McCarthy , Shawn X. Arnold , Souvik Mukherjee
CPC classification number: H01L23/5386 , H01C7/00 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L24/17 , H01L25/18 , H01L2224/13147 , H01L2224/16227 , H01L2924/1434 , H01L2924/19043 , H05K1/113 , H05K1/167 , H05K1/181 , H05K3/3436 , H05K3/4076 , H05K2201/096 , H05K2201/10159 , H05K2201/10378 , H05K2201/10734 , Y02P70/613
Abstract: A routing apparatus includes a PCB having first and second arrays of contact pads, an interposer having third, fourth and fifth arrays of contact pads, the third and fourth arrays of contact pads being disposed on opposing surfaces of the interposer, the third array of contact pads being electrically connected to the first array of contact pads. First and second integrated circuits are respectively mounted on the second and fourth arrays of contact pads. The interposer includes a first group of conductive traces insulated from one another, a first array of conductive vias extending perpendicularly to the first group of conductive traces, the first array of conductive vias including through-vias connecting the third array of contact pads to corresponding contact pads in the fourth array of contact pads. The interposer further including isolation resistors embedded within the first array of conductive vias, each isolation resistor being configured to produce a copy of a signal flowing through the conductive via that is coupled to one end of the isolation resistor on the conductive trace that is coupled to an opposite end of the isolation resistor.
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