公开(公告)号：WO1997047021A1

公开(公告)日：1997-12-11

申请号：PCT/US1997009198

申请日：1997-06-05

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  LUDWIG, Paul, N. ,  HAVEN, Duane, A. ,  MACAULAY, John, M. ,  SPINDT, Christopher, J. ,  CLEEVES, James, M. ,  KNALL, N., Johan

IPC: H01J09/02

CPC classification number: H01J9/025 ,  H01J2329/00

Abstract: An electron-emitter having a lower non-insulating emitter region (42), an overlying insulating layer (44), and a gate layer (48A, 60A, 60B, 120A, or 180A/184) is fabricated by a process in which particles (46) are distributed over one of the following layers: the insulating layer, the gate layer, a primary layer (50A, 62A, or 72) provided over the gate layer, a further layer (74) provided over the primary layer, or a pattern-transfer layer (182). The particles are utilized in defining gate openings (54, 66, 80, 122, or 186/188) through the gate layer. The gate openings are then variously employed in forming dielectric openings (56, 58, 80, 114, 128, 144, or 154) through the insulating layer. Electron-emissive elements that can, for example, be shaped like cones (58A or 70A) or like filaments (106B, 116B, 130A, 146A, or 156B) are formed in the dielectric openings.

Abstract translation: 具有下部非绝缘发射极区域（42），上覆绝缘层（44）和栅极层（48A，60A，60B，120A或180A / 184）的电子发射体通过其中颗粒 （46）分布在以下层之一上：绝缘层，栅极层，设置在栅极层上的初级层（50A，62A或72），设置在主层上的另一层（74），或 图案转印层（182）。 这些颗粒用于通过栅极层限定栅极开口（54,66,80,122或186/188）。 然后，通过绝缘层形成电介质开口（56,58,80,114,128,144或154），各种门开口被不同地使用。 在电介质开口中形成电子发射元件，其可以例如成形为锥体（58A或70A）或类似的细丝（106B，116B，130A，146A或156B）。

公开(公告)号：WO1998026440A1

公开(公告)日：1998-06-18

申请号：PCT/US1997021095

申请日：1997-11-26

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  FAHLEN, Theodore, S. ,  LUDWIG, Paul, N. ,  SCHMID, Anthony, P. ,  PRESSLEY, Robert, J. ,  CHO, Steven, T. ,  CONTE, Alfred, S. ,  COOPER, Anthony, J. ,  POTHOVEN, Floyd, R.

IPC: H01J09/26

CPC classification number: H01J31/123 ,  B23K26/206 ,  C03B23/24 ,  H01J9/261 ,  H01J9/385

Abstract: Portions (40 and 44) of a structure, such as a flat-panel display, are positioned such that a sealing area (40S) of one portion is at least partially separated from a corresponding sealing area (44S) of another portion such that a gap (48) at least partially separates the two sealing areas, typically by height of 25 microns or more. Energy is applied in a "gap jumping technique" to locally heat material of at least one portion along the sealing area such that the material bridges the gap and seals the portions (40 and 44) together. A laser is typically employed to locally melt and draw the material into the gap by a combination of factors such as surface tension and capillary action. A first part of the gap jumping technique may be performed in a non-vacuum environment to tack the portions together, but the gap jumping technique is typically completed in a vacuum to form an evacuated panel.

Abstract translation: 诸如平板显示器的结构的部分（40和44）被定位成使得一部分的密封区域（40S）至少部分地与另一部分的对应的密封区域（44S）分离，使得 间隙（48）至少部分地分离两个密封区域，通常高度为25微米或更大。 能量以“间隙跳跃技术”施加以沿着密封区域局部加热至少一部分的材料，使得材料桥接间隙并将部分（40和44）密封在一起。 通常使用激光器来局部熔融并通过诸如表面张力和毛细管作用的因素的组合将材料吸入间隙中。 间隙跳跃技术的第一部分可以在非真空环境中执行以将部分粘合在一起，但间隙跳跃技术通常在真空中完成以形成抽空的面板。

公开(公告)号：WO1997047020A1

公开(公告)日：1997-12-11

申请号：PCT/US1997009196

申请日：1997-06-05

Applicant: CANDESCENT TECHNOLOGIES CORPORATION

Inventor： CANDESCENT TECHNOLOGIES CORPORATION ,  HAVEN, Duane, A. ,  LUDWIG, Paul, N. ,  SPINDT, Christopher, J. ,  DOBKIN, Daniel, M.

IPC: H01J01/30

CPC classification number: H01J9/025 ,  H01J2329/00

Abstract: A gated electron-emitter is fabricated by a process in which particles (26) are deposited over an insulating layer (24). Gate material is provided over the insulating layer in the space between the particles after which the particles and any overlying material are removed. The remaining gate material forms a gate layer (28A or 48A) through which gate openings (30 or 50) extend at the locations of the removed particles. When the gate material deposition is performed so that part of the gate material extends into the spaces below the particles, the gate openings are beveled. The insulating layer is etched through the gate openings to form dielectric openings (32 or 52). Electron-emissive elements (36A or 56A) are formed in the dielectric openings. This typically involves introducing emitter material through the gate openings into the dielectric openings and using a lift-off layer (34), or an electrochemical technique, to remove excess emitter material.

Abstract translation: 门控电子发射器通过其中颗粒（26）沉积在绝缘层（24）上的方法制造。 在颗粒之间的空间中的绝缘层上提供栅极材料，之后除去颗粒和任何上覆材料。 剩余的栅极材料形成栅极层（28A或48A），栅极开口（30或50）在去除的颗粒的位置处延伸通过栅极层（28A或48A）。 当进行栅极材料沉积使得栅极材料的一部分延伸到颗粒下方的空间中时，栅极开口被倒角。 通过栅极开口蚀刻绝缘层以形成电介质开口（32或52）。 在电介质开口中形成电子发射元件（36A或56A）。 这通常包括将发射体材料通过栅极开口引入电介质开口并使用剥离层（34）或电化学技术来去除多余的发射体材料。

公开(公告)号：EP0992061A1

公开(公告)日：2000-04-12

申请号：EP98921171.9

申请日：1998-05-13

Applicant: Candescent Technologies Corporation

Inventor： PONG, Chungdee ,  PORTER, John, D. ,  FAHLEN, Theodore, S. ,  CURTIN, Christopher, J. ,  NEIMEYER, Robert, G. ,  LUDWIG, Paul, N.

IPC: H01J63/02

CPC classification number: H01J61/305 ,  H01J9/185 ,  H01J9/242 ,  H01J9/261 ,  H01J29/028 ,  H01J29/864 ,  H01J31/123 ,  H01J2329/863 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/8665

Abstract: A flat panel display includes a wall (103-102) which is held in place by a structure formed either on the faceplate (101) or on the backplate (210). In one embodiment, the supporting structure is formed by two adjacent walls that forms a slot which mechanically restrains the wall. In another embodiment, a slot is formed within the faceplate and the walls of the slot mechanically restrain the wall. In one embodiment, the wall segments are inserted into supporting structures that mechanically restrain each wall segment. In another embodiment, a UV curable adhesive is used to maintain walls in their proper alignment and position. The bond electrically connects conductive lines located on the wall and conductive lines located on the faceplate and maintains the wall in proper alignment.

公开(公告)号：EP1018131A1

公开(公告)日：2000-07-12

申请号：EP97926809.1

申请日：1997-06-05

Applicant: Candescent Technologies Corporation

Inventor： HAVEN, Duane, A. ,  LUDWIG, Paul, N. ,  SPINDT, Christopher, J. ,  DOBKIN, Daniel, M.

IPC: H01J1/30

CPC classification number: H01J9/025 ,  H01J2329/00

Abstract: A gated electron-emitter is fabricated by a process in which particles (26) are deposited over an insulating layer (24). Gate material is provided over the insulating layer in the space between the particles after which the particles and any overlying material are removed. The remaining gate material forms a gate layer (28A or 48A) through which gate openings (30 or 50) extend at the locations of the removed particles. When the gate material deposition is performed so that part of the gate material extends into the spaces below the particles, the gate openings are beveled. The insulating layer is etched through the gate openings to form dielectric openings (32 or 52). Electron-emissive elements (36A or 56A) are formed in the dielectric openings. This typically involves introducing emitter material through the gate openings into the dielectric openings and using a lift-off layer (34), or an electrochemical technique, to remove excess emitter material.

公开(公告)号：EP0922293A1

公开(公告)日：1999-06-16

申请号：EP97927842.0

申请日：1997-06-05

Applicant: Candescent Technologies Corporation

Inventor： LUDWIG, Paul, N. ,  HAVEN, Duane, A. ,  MACAULAY, John, M. ,  SPINDT, Christopher, J. ,  CLEEVES, James, M. ,  KNALL, N., Johan

IPC: H01J1 ,  H01J9

CPC classification number: H01J9/025 ,  H01J2329/00

Abstract: An electron-emitter having a lower non-insulating emitter region (42), an overlying insulating layer (44), and a gate layer (48A, 60A, 60B, 120A, or 180A/184) is fabricated by a process in which particles (46) are distributed over one of the following layers: the insulating layer, the gate layer, a primary layer (50A, 62A, or 72) provided over the gate layer, a further layer (74) provided over the primary layer, or a pattern-transfer layer (182). The particles are utilized in defining gate openings (54, 66, 80, 122, or 186/188) through the gate layer. The gate openings are then variously employed in forming dielectric openings (56, 58, 80, 114, 128, 144, or 154) through the insulating layer. Electron-emissive elements that can, for example, be shaped like cones (58A or 70A) or like filaments (106B, 116B, 130A, 146A, or 156B) are formed in the dielectric openings.

公开(公告)号：EP0944912A1

公开(公告)日：1999-09-29

申请号：EP97950630.0

申请日：1997-11-26

Applicant: Candescent Technologies Corporation

Inventor： FAHLEN, Theodore, S. ,  LUDWIG, Paul, N. ,  SCHMID, Anthony, P. ,  PRESSLEY, Robert, J. ,  CHO, Steven, T. ,  CONTE, Alfred, S. ,  COOPER, Anthony, J. ,  POTHOVEN, Floyd, R.

IPC: G09F9 ,  H01J9 ,  H01J31

CPC classification number: H01J31/123 ,  B23K26/206 ,  C03B23/24 ,  H01J9/261 ,  H01J9/385

Abstract: Portions (40 and 44) of a structure, such as a flat-panel display, are positioned such that a sealing area (40S) of one portion is at least partially separated from a corresponding sealing area (44S) of another portion such that a gap (48) at least partially separates the two sealing areas, typically by height of 25 microns or more. Energy is applied in a 'gap jumping technique' to locally heat material of at least one portion along the sealing area such that the material bridges the gap and seals the portions (40 and 44) together. A laser is typically employed to locally melt and draw the material into the gap by a combination of factors such as surface tension. A first part of the gap jumping technique may be performed in a non-vacuum environment to tack the portions together, but the gap jumping technique is typically completed in a vacuum to form an evacuated panel.