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    DUAL PROCESS SEMICONDUCTOR HETEROSTRUCTURES AND METHODS
    1.
    发明申请
    DUAL PROCESS SEMICONDUCTOR HETEROSTRUCTURES AND METHODS 审中-公开
    双过程半导体异构体和方法

    公开(公告)号：WO0063961B1

    公开(公告)日：2001-02-15

    申请号：PCT/US0009999

    申请日：2000-04-13

    Applicant: CBL TECHNOLOGIES INC ,  MATSUSHITA ELECTRONICS CORP

    Inventor： SOLOMON GLENN S ,  MILLER DAVID J ,  UEDA TETSUZO

    IPC: C30B29/38 ,  H01L21/205 ,  H01L33/00 ,  H01L21/31

    CPC classification number: H01L21/0262 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/0254 ,  Y10T428/12493 ,  Y10T428/12528 ,  Y10T428/12576

    Abstract: A method for forming an epitaxial layer (4) involves depositing a buffer layer (2) on a substrate (1) by a first deposition process, followed by deposition of an epitaxial layer (4) by a second deposition process. By using such a dual process, the first and second deposition processes can be optimized, with respect to performance, growth rate, and cost, for different materials of each layer. A semiconductor heterostructure prepared by a dual deposition process includes a buffer layer (2) formed on a substrate by MOCVD, and an epitaxial layer (4) formed on the buffer layer (2), the eptitaxial layer deposited by hydride vapor-phase deposition.

    Abstract translation: 一种用于形成外延层（4）的方法包括通过第一沉积工艺在衬底（1）上沉积缓冲层（2），随后通过第二沉积工艺沉积外延层（4）。 通过使用这种双重过程，可以针对每层不同材料的性能，成长速率和成本优化第一和第二沉积工艺。 通过双沉积工艺制备的半导体异质结构包括通过MOCVD形成在衬底上的缓冲层（2）和形成在缓冲层（2）上的外延层（4），通过氢化物气相沉积沉积的顶点层。

    TRUNCATED SUSCEPTOR FOR VAPOR-PHASE DEPOSITION
    2.
    发明申请
    TRUNCATED SUSCEPTOR FOR VAPOR-PHASE DEPOSITION 审中-公开
    用于蒸发相沉积的截断的SUSCEPTOR

    公开(公告)号：WO0068472A8

    公开(公告)日：2001-04-19

    申请号：PCT/US0009998

    申请日：2000-04-13

    Applicant: CBL TECHNOLOGIES INC ,  MATSUSHITA ELECTRONICS CORP

    Inventor： SOLOMON GLENN S ,  MILLER DAVID J ,  UEDA TETSUZO

    IPC: C23C16/44 ,  C23C16/455 ,  C23C16/458 ,  C23C16/52 ,  C30B25/12 ,  H01L21/205 ,  C30B25/02 ,  C30B25/14 ,  C30B25/16

    CPC classification number: C23C16/4582 ,  C23C16/45591 ,  C30B25/12

    Abstract: A vapor-phase deposition system includes one or more channel units for promoting the downstream passage of reagent gases. A reactor (21) of a vapor-phase deposition system may include one or more channels (25) to promote passage of reagent gases (5) beneath a susceptor stage (33). A susceptor, for arrangement within a reactor during epitaxial growth on a substrate, may include a truncated side (35). The substrate may be aligned with a lower edge of the truncated side, thereby, avoiding chemical deposition on surfaces upstream of the substrate. One or more channels of the susceptor promote the downstream passage of reagent gases within the reactor. Methods for vapor-phase deposition and for promoting downstream passage of reagent gases within a reactor are also disclosed.

    Abstract translation: 气相沉积系统包括用于促进反应气体的下游通过的一个或多个通道单元。 气相沉积系统的反应器（21）可以包括一个或多个通道（25），以促进基座台（33）下面的试剂气体（5）的通过。 用于在衬底外延生长期间在反应器内布置的感受体可以包括截顶侧（35）。 衬底可以与截顶侧的下边缘对准，从而避免在衬底上游的表面上的化学沉积。 基座的一个或多个通道促进反应器内的试剂气体的下游通过。 还公开了用于气相沉积和促进反应器内的试剂气体的下游通过的方法。

    6.
    发明专利
    未知

    公开(公告)号：DE19751294A1

    公开(公告)日：1998-06-04

    申请号：DE19751294

    申请日：1997-11-19

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： YURI MASAAKI ,  UEDA TETSUZO ,  BABA TAKAAKI

    IPC: H01L29/12 ,  H01L21/20 ,  H01L21/203 ,  H01L21/205 ,  H01S5/323

    Abstract: To present a manufacturing method of semiconductor device capable of forming a homogeneous and highly reproducible gallium nitride crystal, comprising the steps of forming a zinc oxide layer on a monocrystalline substrate, forming a first gallium nitride crystal in a temperature range from 0 DEG C. to 900 DEG C., and forming a second gallium nitride crystal in a temperature range from 900 DEG C. to 2000 DEG C.

    PRODUCTION OF GALLIUM NITRIDE CRYSTAL
    8.
    发明专利
    PRODUCTION OF GALLIUM NITRIDE CRYSTAL 失效

    公开(公告)号：JPH10287497A

    公开(公告)日：1998-10-27

    申请号：JP9067497

    申请日：1997-04-09

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： YURI MASAAKI ,  UEDA TETSUZO ,  BABA TAKAAKI

    IPC: C30B29/38 ,  H01L21/20 ,  H01L21/205 ,  H01L29/12 ,  H01S5/00 ,  H01S5/323 ,  H01S3/18

    Abstract: PROBLEM TO BE SOLVED: To make a crystal defect such as a crystal dislocation caused at the time of heteroepitaxial growth produced not on the side of a gallium nitride but on the side of a single crystal silicon thin film and obtain a thick-film gallium nitride crystal excellent in crystallinity by successively forming an amorphous silicon dioxide thin film, a single crystal silicon thin film and gallium nitride on a silicon substrate. SOLUTION: Oxygen ions are implanted onto a silicon substrate 1 and the resultant silicon substrate 1 is then heat-treated at, e.g. 1,320 deg.C to form an amorphous silicon dioxide thin film 2 on the silicon substrate 1 and a single crystal silicon thin film 3 thereon. An amorphous gallium nitride 4 is then formed on the single crystal silicon thin film 3 by a halide vapor-phase epitaxy(VPE) method for regulating the temperature of the substrate 1 to, e.g. 600 deg.C, feeding HCl gas through a metallic Ga surface and reacting the formed gallium chloride with NH3 . A single crystal gallium nitride 5 is further formed thereon by the halide VPE method for regulating the substrate temperature to, e.g. 1,000 deg.C.

    PRODUCTION OF GALLIUM NITRIDE CRYSTAL
    9.
    发明专利
    PRODUCTION OF GALLIUM NITRIDE CRYSTAL 失效

    公开(公告)号：JPH10287496A

    公开(公告)日：1998-10-27

    申请号：JP9067397

    申请日：1997-04-09

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： YURI MASAAKI ,  UEDA TETSUZO ,  BABA TAKAAKI

    IPC: C30B29/38 ,  C30B25/02 ,  C30B25/18 ,  H01L21/205 ,  H01L29/12 ,  H01S5/00 ,  H01S5/323 ,  H01S3/18

    Abstract: PROBLEM TO BE SOLVED: To obtain a gallium nitride crystal excellent in flatness and crystallinity by heating a substrate in a gas atmosphere containing Ga, then forming the first gallium nitride on the substrate and subsequently forming the second gallium nitride on the first gallium nitride at a temperature higher than that for forming the first gallium nitride. SOLUTION: For example, N2 gas is introduced through a GaCl3 surface heated at the melting point or above and a substrate 1 (e.g. a silicon substrate) is then heated at, e.g. 700 deg.C in a gas atmosphere containing Ga to form growth nuclei 2 composed of, e.g. GaCl2 . The first gallium nitride 3 which is amorphous is formed on the growth nuclei 2 by, e.g. a halide vapor-phase epitaxy(VPE) method for regulating the temperature of the substrate 1 to 600 deg.C and reacting the GaCl3 with NH3 . The second gallium nitride 4 which is a single crystal is then formed on the first gallium nitride 3 at a higher temperature (e.g. 1,000 deg.C) than that for forming the first gallium nitride 3 on the first gallium nitride 3 by, e.g. the halide VPE method.

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