公开(公告)号：JPH07319704A

公开(公告)日：1995-12-08

申请号：JP11600195

申请日：1995-05-15

Applicant: CONS RIC MICROELETTRONICA

Inventor： BIAJIYO JIYAKAROONE ,  BUINCHIENTSUO KATANIA ,  KURAUDEIO RUTSUTSUI ,  BUINCHIENTSUO MATORANGA

IPC: G06F9/44 ,  G06N7/02 ,  G06N7/04 ,  H03K19/20

Abstract: PURPOSE: To provide a parallel processing method and the circuit constitution for many fuzzy rules independent of the premise part of a rule or the number of terms constituting a logical operator connecting the rules. CONSTITUTION: An inference unit 1 includes plural same inference processing lines 2 having a module structure which are connected in parallel between a data bus and a connecting block 19, and each includes an evaluation block 3, calculation block 4, and consequent part processing block 5 in a belonging relation, and those blocks 3, 4, and 5 are serially connected.