公开(公告)号：JPH08107629A

公开(公告)日：1996-04-23

申请号：JP14207495

申请日：1995-06-08

Applicant: CONS RIC MICROELETTRONICA

Inventor： GUREGORIO BONTENPO ,  FURANCHIESUKO PURUBUIRENTEI ,  PAORO KORETSUTEI ,  ROBERUTO GARIBORUDEI

IPC: H02H3/08 ,  H03K17/082 ,  H03K17/284

Abstract: PURPOSE: To independently control on-times and off-times of multiplex independent channels by a method, wherein a generating circuit which generates on times and off-times of integrated switches is connected between the input terminal of a 1st logic gate and the output of an output device. CONSTITUTION: A comparator 5, a logic gate PL1, a driver 6, a DMOS transistor Tr7 and an output terminal S1 are connected in series with the input part 2 of an overload protective device 13. The drain D1 of the transistor Tr7 is inputted to an operational amplifier 9, whose output 03 is fed back to the driver 6. A circuit A which generates on-times and off-times of integrated switches is provided between the output 04 of the amplifier 9 and the logic gate PL1. In the circuit A, the output of a capacitor C1 and a free-running type oscillator 14 is inputted to a logic gate PL2 and the on-times and off-times of respective channels are set by a storage block 16 and a counter block 15. The set on-times and off-times are inputted to the logic gate PL1. With this constitution, an interval between the on-times and off-times can be set for every channel.

公开(公告)号：JPH08272470A

公开(公告)日：1996-10-18

申请号：JP6881596

申请日：1996-03-25

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： ROBERUTO GARIBORUDEI ,  FURANCHIESUKO PURUBUIRENTEI

IPC: G01R19/165 ,  G05F1/46 ,  G05F3/26 ,  G05F3/28 ,  G05F3/30 ,  G11C5/14 ,  H02J1/00

Abstract: PROBLEM TO BE SOLVED: To provide a circuit for generating a reference voltage and simultaneously detecting the drop of a power supply voltage. SOLUTION: In this circuit for generating the reference voltage and detecting the drop of the power supply voltage provided with at least one piece of a threshold value comparator 12 provided with an input terminal IN and an output terminal and a voltage divider 14 connected between a first power supply voltage reference VS and a second voltage reference GND and connected to the input terminal IN of the comparator 12, further, the output terminal OUT of the comparator 12 is connected to the input terminal IN through at least one piece of a feedback network provided with at least one piece of a current generator CG1. The feedback network is further provided with a buffer block 13 provided with the input terminal. connected to the comparator 12 and a first output terminal DO connected to a switch SW and the switch SW is connected between the circuit node X2 of the voltage divider 14 and the second voltage reference GND.

公开(公告)号：JPH0969760A

公开(公告)日：1997-03-11

申请号：JP7435096

申请日：1996-03-28

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： FURANCHIESUKO PURUBUIRENTEI ,  RITSUKARUDO URUSHIINO ,  ROBERUTO GARIBORUDEI

IPC: H03F3/45 ,  H03K3/011 ,  H03K3/0231 ,  H03K3/354 ,  H03K4/06 ,  H03K19/0948

Abstract: PROBLEM TO BE SOLVED: To provide an oscillation circuit generating an oscillation electric signal which is not easily affected by supply voltage and a temperature. SOLUTION: A capacitor C, a charge circuit CCA and a control circuit CCO are provided. The charge circuit CCA contains a first current generation device GEN1 and a second current generation device GEN2, which have first and second current values and respectively opposite directions, and switch means SW1 and SW2 designed in such a way that the generation devices GEN1 and GEN2 are connected to the capacitor C. The control circuit CCO has voltage input connected to the capacitor C and output connected to the control inputs of the switch means SW1 and SW2 and contains a comparator containing a hysteresis having a lower-side threshold and an upper-side threshold.

公开(公告)号：JPH08279737A

公开(公告)日：1996-10-22

申请号：JP29860695

申请日：1995-11-16

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： PAORO KORETSUTEI ,  GUREGORIO BONTENPO ,  FURANCHIESUKO PURUBUIRENTEI ,  ROBERUTO GARIBORUDEI

IPC: H01L27/04 ,  G05F1/573 ,  H01L21/822 ,  H01L29/78 ,  H02H7/00 ,  H03K17/08

Abstract: PROBLEM TO BE SOLVED: To provide a simple and correct method for protecting a power transistor(TR). SOLUTION: The method is provided with a process where a 1st electric signal S1 proportional substantially to a current flowing to a path D-S is generated, a process where a 2nd electric signal S2 proportional substantially to a voltage across the path D-S is generated, a process where the 1st signal S1 and the 2nd signal S2 are multiplied to generate an electric generating signal PS, a process where the electric generating signal PS is compared with an electric reference signal RS to generate an electric difference signal DS, and a process where the electric difference signal DS is used to drive a control terminal G so that the electric generating signal PS is smaller than the reference signal RS.